kopia lustrzana https://github.com/jgromes/RadioLib
[CC1101] Chore: uncrustify formatting
jgromes
rodzic
203ff5f1de
commit
09792bfc6b
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@ -60,7 +60,7 @@ int16_t CC1101::transmit(const uint8_t* data, size_t len, uint8_t addr) {
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int16_t CC1101::receive(uint8_t* data, size_t len) {
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// calculate timeout (500 ms + 400 full max-length packets at current bit rate)
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RadioLibTime_t timeout = 500 + (1.0f/(this->bitRate))*(RADIOLIB_CC1101_MAX_PACKET_LENGTH*400.0f);
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RadioLibTime_t timeout = 500 + (1.0f / (this->bitRate)) * (RADIOLIB_CC1101_MAX_PACKET_LENGTH * 400.0f);
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// start reception
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int16_t state = startReceive();
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@ -119,7 +119,7 @@ int16_t CC1101::standby(uint8_t mode) {
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}
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int16_t CC1101::sleep() {
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int16_t state =standby();
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int16_t state = standby();
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SPIsendCommand(RADIOLIB_CC1101_CMD_POWER_DOWN);
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return(state);
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}
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@ -266,15 +266,15 @@ int16_t CC1101::startTransmit(const uint8_t* data, size_t len, uint8_t addr) {
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// optionally write packet length
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if(this->packetLengthConfig == RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE) {
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if (len > RADIOLIB_CC1101_MAX_PACKET_LENGTH - 1) {
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return(RADIOLIB_ERR_PACKET_TOO_LONG);
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if(len > RADIOLIB_CC1101_MAX_PACKET_LENGTH - 1) {
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return(RADIOLIB_ERR_PACKET_TOO_LONG);
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}
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SPIwriteRegister(RADIOLIB_CC1101_REG_FIFO, len + (filter != RADIOLIB_CC1101_ADR_CHK_NONE? 1:0));
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dataSent+= 1;
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dataSent += 1;
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}
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// check address filtering
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//uint8_t filter = SPIgetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, 1, 0);
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// uint8_t filter = SPIgetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, 1, 0);
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if(filter != RADIOLIB_CC1101_ADR_CHK_NONE) {
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SPIwriteRegister(RADIOLIB_CC1101_REG_FIFO, addr);
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dataSent += 1;
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@ -292,21 +292,21 @@ int16_t CC1101::startTransmit(const uint8_t* data, size_t len, uint8_t addr) {
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SPIsendCommand(RADIOLIB_CC1101_CMD_TX);
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// Keep feeding the FIFO until the packet is done
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while (dataSent < len) {
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while(dataSent < len) {
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uint8_t fifoBytes = 0;
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uint8_t prevFifobytes = 0;
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// Check number of bytes on FIFO twice due to the CC1101 errata. Block until two reads are equal.
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do{
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do {
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fifoBytes = SPIgetRegValue(RADIOLIB_CC1101_REG_TXBYTES, 6, 0);
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prevFifobytes = SPIgetRegValue(RADIOLIB_CC1101_REG_TXBYTES, 6, 0);
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} while (fifoBytes != prevFifobytes);
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} while(fifoBytes != prevFifobytes);
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//If there is room add more data to the FIFO
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if (fifoBytes < RADIOLIB_CC1101_FIFO_SIZE) {
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uint8_t bytesToWrite = RADIOLIB_MIN((uint8_t)(RADIOLIB_CC1101_FIFO_SIZE - fifoBytes), (uint8_t)(len - dataSent));
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SPIwriteRegisterBurst(RADIOLIB_CC1101_REG_FIFO, const_cast<uint8_t*>(&data[dataSent]), bytesToWrite);
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dataSent += bytesToWrite;
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// If there is room add more data to the FIFO
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if(fifoBytes < RADIOLIB_CC1101_FIFO_SIZE) {
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uint8_t bytesToWrite = RADIOLIB_MIN((uint8_t)(RADIOLIB_CC1101_FIFO_SIZE - fifoBytes), (uint8_t)(len - dataSent));
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SPIwriteRegisterBurst(RADIOLIB_CC1101_REG_FIFO, const_cast<uint8_t*>(&data[dataSent]), bytesToWrite);
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dataSent += bytesToWrite;
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}
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}
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return(state);
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@ -314,17 +314,17 @@ int16_t CC1101::startTransmit(const uint8_t* data, size_t len, uint8_t addr) {
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int16_t CC1101::finishTransmit() {
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// set mode to standby to disable transmitter/RF switch
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// Check MARCSTATE for Idle to let anything in the FIFO empty
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// Timeout is 2x FIFO transmit time
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RadioLibTime_t timeout = (1.0f/(this->bitRate))*(RADIOLIB_CC1101_FIFO_SIZE*2.0f);
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RadioLibTime_t timeout = (1.0f / (this->bitRate)) * (RADIOLIB_CC1101_FIFO_SIZE * 2.0f);
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RadioLibTime_t start = this->mod->hal->millis();
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while(SPIgetRegValue(RADIOLIB_CC1101_REG_MARCSTATE, 4, 0) != 0x01) {
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if(this->mod->hal->millis() - start > timeout) {
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return(RADIOLIB_ERR_TX_TIMEOUT);
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}
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}
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int16_t state = standby();
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RADIOLIB_ASSERT(state);
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@ -386,7 +386,7 @@ int16_t CC1101::readData(uint8_t* data, size_t len) {
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// If status byte is enabled at least 2 bytes (2 status bytes + any following packet) will remain in FIFO.
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int16_t state = RADIOLIB_ERR_NONE;
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if (isAppendStatus) {
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if(isAppendStatus) {
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// read RSSI byte
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this->rawRSSI = SPIgetRegValue(RADIOLIB_CC1101_REG_FIFO);
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@ -430,7 +430,7 @@ int16_t CC1101::setFrequency(float freq) {
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// set mode to standby
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SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
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//set carrier frequency
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// set carrier frequency
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uint32_t base = 1;
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uint32_t FRF = (freq * (base << 16)) / 26.0f;
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int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_FREQ2, (FRF & 0xFF0000) >> 16, 7, 0);
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@ -466,7 +466,9 @@ int16_t CC1101::setBitRate(float br) {
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}
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int16_t CC1101::setBitRateTolerance(uint8_t brt) {
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if (brt > 0x03) return (RADIOLIB_ERR_INVALID_BIT_RATE_TOLERANCE_VALUE);
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if(brt > 0x03) {
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return(RADIOLIB_ERR_INVALID_BIT_RATE_TOLERANCE_VALUE);
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}
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// Set Bit Rate tolerance
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int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_BSCFG, brt, 1, 0);
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@ -482,8 +484,8 @@ int16_t CC1101::setRxBandwidth(float rxBw) {
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// calculate exponent and mantissa values
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for(int8_t e = 3; e >= 0; e--) {
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for(int8_t m = 3; m >= 0; m --) {
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float point = (RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0f)/(8 * (m + 4) * ((uint32_t)1 << e));
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for(int8_t m = 3; m >= 0; m--) {
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float point = (RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0f) / (8 * (m + 4) * ((uint32_t)1 << e));
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if(fabs((rxBw * 1000.0f - point) <= 1000.0f)) {
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// set Rx channel filter bandwidth
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return(SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG4, (e << 6) | (m << 4), 7, 4));
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@ -499,11 +501,11 @@ int16_t CC1101::autoSetRxBandwidth() {
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// Uncertainty ~ +/- 40ppm for a cheap CC1101
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// Uncertainty * 2 for both transmitter and receiver
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float uncertainty = ((this->frequency) * 40 * 2);
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uncertainty = (uncertainty/1000); //Since bitrate is in kBit
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uncertainty = (uncertainty / 1000); // Since bitrate is in kBit
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float minbw = ((this->bitRate) + uncertainty);
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const int options[16] = { 58, 68, 81, 102, 116, 135, 162, 203, 232, 270, 325, 406, 464, 541, 650, 812 };
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for(int i = 0; i < 16; i++) {
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if(options[i] > minbw) {
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return(setRxBandwidth(options[i]));
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@ -521,7 +523,7 @@ int16_t CC1101::setFrequencyDeviation(float freqDev) {
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}
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// check range unless 0 (special value)
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if (freqDev != 0) {
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if(freqDev != 0) {
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RADIOLIB_CHECK_RANGE(newFreqDev, 1.587f, 380.8f, RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION);
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}
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@ -536,17 +538,17 @@ int16_t CC1101::setFrequencyDeviation(float freqDev) {
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// set frequency deviation value
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int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_DEVIATN, (e << 4), 6, 4);
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_DEVIATN, m, 2, 0);
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return(state);
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}
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int16_t CC1101::getFrequencyDeviation(float *freqDev) {
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if (freqDev == NULL) {
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int16_t CC1101::getFrequencyDeviation(float* freqDev) {
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if(freqDev == NULL) {
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return(RADIOLIB_ERR_NULL_POINTER);
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}
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// if ASK/OOK, deviation makes no sense
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if (this->modulation == RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK) {
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if(this->modulation == RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK) {
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*freqDev = 0.0;
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return(RADIOLIB_ERR_NONE);
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@ -558,7 +560,7 @@ int16_t CC1101::getFrequencyDeviation(float *freqDev) {
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// calculate frequency deviation (pag. 79 of the CC1101 datasheet):
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//
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// freqDev = (fXosc / 2^17) * (8 + m) * 2^e
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// freqDev = (fXosc / 2^17) * (8 + m) * 2^e
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//
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*freqDev = (1000.0f / (uint32_t(1) << 17)) - (8 + m) * (uint32_t(1) << e);
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@ -574,7 +576,7 @@ int16_t CC1101::setOutputPower(int8_t pwr) {
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// store the value
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this->power = pwr;
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if(this->modulation == RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK){
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if(this->modulation == RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK) {
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// Amplitude modulation:
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// PA_TABLE[0] is the power to be used when transmitting a 0 (no power)
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// PA_TABLE[1] is the power to be used when transmitting a 1 (full power)
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@ -639,14 +641,14 @@ int16_t CC1101::checkOutputPower(int8_t power, int8_t* clipped, uint8_t* raw) {
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}
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// get raw power setting
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uint8_t paTable[8][4] = {{0x12, 0x12, 0x03, 0x03},
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{0x0D, 0x0E, 0x0F, 0x0E},
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{0x1C, 0x1D, 0x1E, 0x1E},
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{0x34, 0x34, 0x27, 0x27},
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{0x51, 0x60, 0x50, 0x8E},
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{0x85, 0x84, 0x81, 0xCD},
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{0xCB, 0xC8, 0xCB, 0xC7},
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{0xC2, 0xC0, 0xC2, 0xC0}};
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uint8_t paTable[8][4] = { {0x12, 0x12, 0x03, 0x03},
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{0x0D, 0x0E, 0x0F, 0x0E},
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{0x1C, 0x1D, 0x1E, 0x1E},
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{0x34, 0x34, 0x27, 0x27},
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{0x51, 0x60, 0x50, 0x8E},
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{0x85, 0x84, 0x81, 0xCD},
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{0xCB, 0xC8, 0xCB, 0xC7},
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{0xC2, 0xC0, 0xC2, 0xC0} };
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for(uint8_t i = 0; i < sizeof(allowedPwrs); i++) {
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if(power == allowedPwrs[i]) {
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@ -654,7 +656,7 @@ int16_t CC1101::checkOutputPower(int8_t power, int8_t* clipped, uint8_t* raw) {
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return(RADIOLIB_ERR_NONE);
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}
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}
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return(RADIOLIB_ERR_INVALID_OUTPUT_POWER);
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}
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@ -719,7 +721,7 @@ int16_t CC1101::setPreambleLength(uint8_t preambleLength, uint8_t qualityThresho
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}
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// set preabmble quality threshold and the actual length
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uint8_t pqt = qualityThreshold/4;
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uint8_t pqt = qualityThreshold / 4;
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if(pqt > 7) {
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pqt = 7;
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}
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@ -783,9 +785,9 @@ float CC1101::getRSSI() {
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if(!this->directModeEnabled) {
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if(this->rawRSSI >= 128) {
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rssi = (((float)this->rawRSSI - 256.0f)/2.0f) - 74.0f;
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rssi = (((float)this->rawRSSI - 256.0f) / 2.0f) - 74.0f;
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} else {
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rssi = (((float)this->rawRSSI)/2.0f) - 74.0f;
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rssi = (((float)this->rawRSSI) / 2.0f) - 74.0f;
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}
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} else {
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uint8_t rawRssi = SPIreadRegister(RADIOLIB_CC1101_REG_RSSI);
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@ -857,7 +859,7 @@ int16_t CC1101::disableSyncWordFiltering(bool requireCarrierSense) {
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int16_t CC1101::setCrcFiltering(bool enable) {
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this->crcOn = enable;
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if (this->crcOn == true) {
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if(this->crcOn == true) {
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return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_CRC_ON, 2, 2));
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} else {
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return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_CRC_OFF, 2, 2));
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@ -878,14 +880,14 @@ int16_t CC1101::setPromiscuousMode(bool enable, bool requireCarrierSense) {
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RADIOLIB_ASSERT(state);
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// disable sync word filtering and insertion
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// this also disables preamble
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// Can enable Sync Mode with carriersense when promiscuous is enabled. Default is false: Sync Mode None
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// Can enable Sync Mode with carriersense when promiscuous is enabled. Default is false: Sync Mode None
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state = disableSyncWordFiltering(requireCarrierSense);
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RADIOLIB_ASSERT(state);
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// disable CRC filtering
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state = setCrcFiltering(false);
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} else {
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state = setPreambleLength(RADIOLIB_CC1101_DEFAULT_PREAMBLELEN, RADIOLIB_CC1101_DEFAULT_PREAMBLELEN/4);
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state = setPreambleLength(RADIOLIB_CC1101_DEFAULT_PREAMBLELEN, RADIOLIB_CC1101_DEFAULT_PREAMBLELEN / 4);
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RADIOLIB_ASSERT(state);
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// enable sync word filtering and insertion
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@ -902,7 +904,7 @@ int16_t CC1101::setPromiscuousMode(bool enable, bool requireCarrierSense) {
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}
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bool CC1101::getPromiscuousMode() {
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return (this->promiscuous);
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return(this->promiscuous);
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}
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int16_t CC1101::setDataShaping(uint8_t sh) {
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@ -1111,14 +1113,14 @@ int16_t CC1101::directMode(bool sync) {
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this->directModeEnabled = true;
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if(sync) {
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// set GDO0 and GDO2 mapping
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SERIAL_CLOCK , 5, 0);
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG2, RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC , 5, 0);
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SERIAL_CLOCK, 5, 0);
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG2, RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC, 5, 0);
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// set continuous mode
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_PKT_FORMAT_SYNCHRONOUS, 5, 4);
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} else {
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// set GDO0 mapping
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SERIAL_DATA_ASYNC , 5, 0);
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SERIAL_DATA_ASYNC, 5, 0);
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// set asynchronous continuous mode
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state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_PKT_FORMAT_ASYNCHRONOUS, 5, 4);
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@ -1128,9 +1130,9 @@ int16_t CC1101::directMode(bool sync) {
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return(state);
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}
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void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t& exp, uint8_t& mant) {
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void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t &exp, uint8_t &mant) {
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// get table origin point (exp = 0, mant = 0)
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float origin = (mantOffset * RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0f)/((uint32_t)1 << divExp);
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float origin = (mantOffset * RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0f) / ((uint32_t)1 << divExp);
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// iterate over possible exponent values
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for(int8_t e = expMax; e >= 0; e--) {
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@ -1143,7 +1145,7 @@ void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8
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exp = e;
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// calculate size of step between table rows
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float stepSize = intervalStart/(float)mantOffset;
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float stepSize = intervalStart / (float)mantOffset;
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// get target point position (exp = e, mant = m)
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mant = ((target - intervalStart) / stepSize);
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@ -1156,7 +1158,7 @@ void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8
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int16_t CC1101::setPacketMode(uint8_t mode, uint16_t len) {
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// check length
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if (len > RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
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if(len > RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
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return(RADIOLIB_ERR_PACKET_TOO_LONG);
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}
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@ -100,369 +100,369 @@
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#define RADIOLIB_CC1101_REG_FIFO 0x3F
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// status byte (returned during SPI transactions) MSB LSB DESCRIPTION
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#define RADIOLIB_CC1101_STATUS_CHIP_READY 0b00000000 // 7 7 chip ready
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#define RADIOLIB_CC1101_STATUS_CHIP_NOT_READY 0b10000000 // 7 7 chip not ready (power/crystal not stable)
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#define RADIOLIB_CC1101_STATUS_IDLE 0b00000000 // 6 4 idle
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#define RADIOLIB_CC1101_STATUS_RX 0b00010000 // 6 4 Rx
|
||||
#define RADIOLIB_CC1101_STATUS_TX 0b00100000 // 6 4 Tx
|
||||
#define RADIOLIB_CC1101_STATUS_FSTXON 0b00110000 // 6 4 Fast Tx ready
|
||||
#define RADIOLIB_CC1101_STATUS_CALIBRATE 0b01000000 // 6 4 synthesizer calibration running
|
||||
#define RADIOLIB_CC1101_STATUS_SETTLING 0b01010000 // 6 4 PLL settling
|
||||
#define RADIOLIB_CC1101_STATUS_RXFIFO_OVERFLOW 0b01100000 // 6 4 Rx FIFO overflow
|
||||
#define RADIOLIB_CC1101_STATUS_TXFIFO_UNDERFLOW 0b01110000 // 6 4 Tx FIFO underflow
|
||||
#define RADIOLIB_CC1101_STATUS_CHIP_READY 0b00000000 // 7 7 chip ready
|
||||
#define RADIOLIB_CC1101_STATUS_CHIP_NOT_READY 0b10000000 // 7 7 chip not ready (power/crystal not stable)
|
||||
#define RADIOLIB_CC1101_STATUS_IDLE 0b00000000 // 6 4 idle
|
||||
#define RADIOLIB_CC1101_STATUS_RX 0b00010000 // 6 4 Rx
|
||||
#define RADIOLIB_CC1101_STATUS_TX 0b00100000 // 6 4 Tx
|
||||
#define RADIOLIB_CC1101_STATUS_FSTXON 0b00110000 // 6 4 Fast Tx ready
|
||||
#define RADIOLIB_CC1101_STATUS_CALIBRATE 0b01000000 // 6 4 synthesizer calibration running
|
||||
#define RADIOLIB_CC1101_STATUS_SETTLING 0b01010000 // 6 4 PLL settling
|
||||
#define RADIOLIB_CC1101_STATUS_RXFIFO_OVERFLOW 0b01100000 // 6 4 Rx FIFO overflow
|
||||
#define RADIOLIB_CC1101_STATUS_TXFIFO_UNDERFLOW 0b01110000 // 6 4 Tx FIFO underflow
|
||||
|
||||
// RADIOLIB_CC1101_REG_IOCFG2
|
||||
#define RADIOLIB_CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO2_INV 0b01000000 // 6 6 active low
|
||||
#define RADIOLIB_CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO2_INV 0b01000000 // 6 6 active low
|
||||
|
||||
// RADIOLIB_CC1101_REG_IOCFG1
|
||||
#define RADIOLIB_CC1101_GDO_DS_LOW 0b00000000 // 7 7 GDOx output drive strength: low (default)
|
||||
#define RADIOLIB_CC1101_GDO_DS_HIGH 0b10000000 // 7 7 high
|
||||
#define RADIOLIB_CC1101_GDO1_NORM 0b00000000 // 6 6 GDO1 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO1_INV 0b01000000 // 6 6 active low
|
||||
#define RADIOLIB_CC1101_GDO_DS_LOW 0b00000000 // 7 7 GDOx output drive strength: low (default)
|
||||
#define RADIOLIB_CC1101_GDO_DS_HIGH 0b10000000 // 7 7 high
|
||||
#define RADIOLIB_CC1101_GDO1_NORM 0b00000000 // 6 6 GDO1 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO1_INV 0b01000000 // 6 6 active low
|
||||
|
||||
// RADIOLIB_CC1101_REG_IOCFG0
|
||||
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_OFF 0b00000000 // 7 7 analog temperature sensor output: disabled (default)
|
||||
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_ON 0b10000000 // 7 7 enabled
|
||||
#define RADIOLIB_CC1101_GDO0_NORM 0b00000000 // 6 6 GDO0 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO0_INV 0b01000000 // 6 6 active low
|
||||
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_OFF 0b00000000 // 7 7 analog temperature sensor output: disabled (default)
|
||||
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_ON 0b10000000 // 7 7 enabled
|
||||
#define RADIOLIB_CC1101_GDO0_NORM 0b00000000 // 6 6 GDO0 output: active high (default)
|
||||
#define RADIOLIB_CC1101_GDO0_INV 0b01000000 // 6 6 active low
|
||||
|
||||
// RADIOLIB_CC1101_REG_IOCFG2 + REG_IOCFG1 + REG_IOCFG0
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL 0x00 // 5 0 Rx FIFO full or above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END 0x01 // 5 0 Rx FIFO full or above threshold or reached packet end
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_ABOVE_THR 0x02 // 5 0 Tx FIFO above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_FULL 0x03 // 5 0 Tx FIFO full
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_OVERFLOW 0x04 // 5 0 Rx FIFO overflowed
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_UNDERFLOW 0x05 // 5 0 Tx FIFO underflowed
|
||||
#define RADIOLIB_CC1101_GDOX_SYNC_WORD_SENT_OR_PKT_RECEIVED 0x06 // 5 0 sync word was sent or packet was received
|
||||
#define RADIOLIB_CC1101_GDOX_PKT_RECEIVED_CRC_OK 0x07 // 5 0 packet received and CRC check passed
|
||||
#define RADIOLIB_CC1101_GDOX_PREAMBLE_QUALITY_REACHED 0x08 // 5 0 received preamble quality is above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_CHANNEL_CLEAR 0x09 // 5 0 RSSI level below threshold (channel is clear)
|
||||
#define RADIOLIB_CC1101_GDOX_PLL_LOCKED 0x0A // 5 0 PLL is locked
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_CLOCK 0x0B // 5 0 serial data clock
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC 0x0C // 5 0 serial data output in: synchronous mode
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_ASYNC 0x0D // 5 0 asynchronous mode
|
||||
#define RADIOLIB_CC1101_GDOX_CARRIER_SENSE 0x0E // 5 0 RSSI above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_CRC_OK 0x0F // 5 0 CRC check passed
|
||||
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA1 0x16 // 5 0 direct access to demodulated data
|
||||
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA0 0x17 // 5 0 direct access to demodulated data
|
||||
#define RADIOLIB_CC1101_GDOX_PA_PD 0x1B // 5 0 power amplifier circuit is powered down
|
||||
#define RADIOLIB_CC1101_GDOX_LNA_PD 0x1C // 5 0 low-noise amplifier circuit is powered down
|
||||
#define RADIOLIB_CC1101_GDOX_RX_SYMBOL_TICK 0x1D // 5 0 direct access to symbol tick of received data
|
||||
#define RADIOLIB_CC1101_GDOX_WOR_EVNT0 0x24 // 5 0 wake-on-radio event 0
|
||||
#define RADIOLIB_CC1101_GDOX_WOR_EVNT1 0x25 // 5 0 wake-on-radio event 1
|
||||
#define RADIOLIB_CC1101_GDOX_CLK_256 0x26 // 5 0 256 Hz clock
|
||||
#define RADIOLIB_CC1101_GDOX_CLK_32K 0x27 // 5 0 32 kHz clock
|
||||
#define RADIOLIB_CC1101_GDOX_CHIP_RDYN 0x29 // 5 0 (default for GDO2)
|
||||
#define RADIOLIB_CC1101_GDOX_XOSC_STABLE 0x2B // 5 0
|
||||
#define RADIOLIB_CC1101_GDOX_HIGH_Z 0x2E // 5 0 high impedance state (default for GDO1)
|
||||
#define RADIOLIB_CC1101_GDOX_HW_TO_0 0x2F // 5 0
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1 0x30 // 5 0 crystal oscillator clock: f = f(XOSC)/1
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1_5 0x31 // 5 0 f = f(XOSC)/1.5
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_2 0x32 // 5 0 f = f(XOSC)/2
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_3 0x33 // 5 0 f = f(XOSC)/3
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_4 0x34 // 5 0 f = f(XOSC)/4
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_6 0x35 // 5 0 f = f(XOSC)/6
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_8 0x36 // 5 0 f = f(XOSC)/8
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_12 0x37 // 5 0 f = f(XOSC)/12
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_16 0x38 // 5 0 f = f(XOSC)/16
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_24 0x39 // 5 0 f = f(XOSC)/24
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_32 0x3A // 5 0 f = f(XOSC)/32
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_48 0x3B // 5 0 f = f(XOSC)/48
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_64 0x3C // 5 0 f = f(XOSC)/64
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_96 0x3D // 5 0 f = f(XOSC)/96
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_128 0x3E // 5 0 f = f(XOSC)/128
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_192 0x3F // 5 0 f = f(XOSC)/192 (default for GDO0)
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL 0x00 // 5 0 Rx FIFO full or above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END 0x01 // 5 0 Rx FIFO full or above threshold or reached packet end
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_ABOVE_THR 0x02 // 5 0 Tx FIFO above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_FULL 0x03 // 5 0 Tx FIFO full
|
||||
#define RADIOLIB_CC1101_GDOX_RX_FIFO_OVERFLOW 0x04 // 5 0 Rx FIFO overflowed
|
||||
#define RADIOLIB_CC1101_GDOX_TX_FIFO_UNDERFLOW 0x05 // 5 0 Tx FIFO underflowed
|
||||
#define RADIOLIB_CC1101_GDOX_SYNC_WORD_SENT_OR_PKT_RECEIVED 0x06 // 5 0 sync word was sent or packet was received
|
||||
#define RADIOLIB_CC1101_GDOX_PKT_RECEIVED_CRC_OK 0x07 // 5 0 packet received and CRC check passed
|
||||
#define RADIOLIB_CC1101_GDOX_PREAMBLE_QUALITY_REACHED 0x08 // 5 0 received preamble quality is above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_CHANNEL_CLEAR 0x09 // 5 0 RSSI level below threshold (channel is clear)
|
||||
#define RADIOLIB_CC1101_GDOX_PLL_LOCKED 0x0A // 5 0 PLL is locked
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_CLOCK 0x0B // 5 0 serial data clock
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC 0x0C // 5 0 serial data output in: synchronous mode
|
||||
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_ASYNC 0x0D // 5 0 asynchronous mode
|
||||
#define RADIOLIB_CC1101_GDOX_CARRIER_SENSE 0x0E // 5 0 RSSI above threshold
|
||||
#define RADIOLIB_CC1101_GDOX_CRC_OK 0x0F // 5 0 CRC check passed
|
||||
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA1 0x16 // 5 0 direct access to demodulated data
|
||||
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA0 0x17 // 5 0 direct access to demodulated data
|
||||
#define RADIOLIB_CC1101_GDOX_PA_PD 0x1B // 5 0 power amplifier circuit is powered down
|
||||
#define RADIOLIB_CC1101_GDOX_LNA_PD 0x1C // 5 0 low-noise amplifier circuit is powered down
|
||||
#define RADIOLIB_CC1101_GDOX_RX_SYMBOL_TICK 0x1D // 5 0 direct access to symbol tick of received data
|
||||
#define RADIOLIB_CC1101_GDOX_WOR_EVNT0 0x24 // 5 0 wake-on-radio event 0
|
||||
#define RADIOLIB_CC1101_GDOX_WOR_EVNT1 0x25 // 5 0 wake-on-radio event 1
|
||||
#define RADIOLIB_CC1101_GDOX_CLK_256 0x26 // 5 0 256 Hz clock
|
||||
#define RADIOLIB_CC1101_GDOX_CLK_32K 0x27 // 5 0 32 kHz clock
|
||||
#define RADIOLIB_CC1101_GDOX_CHIP_RDYN 0x29 // 5 0 (default for GDO2)
|
||||
#define RADIOLIB_CC1101_GDOX_XOSC_STABLE 0x2B // 5 0
|
||||
#define RADIOLIB_CC1101_GDOX_HIGH_Z 0x2E // 5 0 high impedance state (default for GDO1)
|
||||
#define RADIOLIB_CC1101_GDOX_HW_TO_0 0x2F // 5 0
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1 0x30 // 5 0 crystal oscillator clock: f = f(XOSC)/1
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1_5 0x31 // 5 0 f = f(XOSC)/1.5
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_2 0x32 // 5 0 f = f(XOSC)/2
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_3 0x33 // 5 0 f = f(XOSC)/3
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_4 0x34 // 5 0 f = f(XOSC)/4
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_6 0x35 // 5 0 f = f(XOSC)/6
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_8 0x36 // 5 0 f = f(XOSC)/8
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_12 0x37 // 5 0 f = f(XOSC)/12
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_16 0x38 // 5 0 f = f(XOSC)/16
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_24 0x39 // 5 0 f = f(XOSC)/24
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_32 0x3A // 5 0 f = f(XOSC)/32
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_48 0x3B // 5 0 f = f(XOSC)/48
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_64 0x3C // 5 0 f = f(XOSC)/64
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_96 0x3D // 5 0 f = f(XOSC)/96
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_128 0x3E // 5 0 f = f(XOSC)/128
|
||||
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_192 0x3F // 5 0 f = f(XOSC)/192 (default for GDO0)
|
||||
|
||||
// RADIOLIB_CC1101_REG_FIFOTHR
|
||||
#define RADIOLIB_CC1101_ADC_RETENTION_OFF 0b00000000 // 6 6 do not retain ADC settings in sleep mode (default)
|
||||
#define RADIOLIB_CC1101_ADC_RETENTION_ON 0b01000000 // 6 6 retain ADC settings in sleep mode
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_0_DB 0b00000000 // 5 4 Rx attenuation: 0 dB (default)
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB
|
||||
#define RADIOLIB_CC1101_FIFO_THR_TX_61_RX_4 0b00000000 // 3 0 TX fifo threshold: 61, RX fifo threshold: 4
|
||||
#define RADIOLIB_CC1101_FIFO_THR_TX_33_RX_32 0b00000111 // 3 0 TX fifo threshold: 33, RX fifo threshold: 32
|
||||
#define RADIOLIB_CC1101_ADC_RETENTION_OFF 0b00000000 // 6 6 do not retain ADC settings in sleep mode (default)
|
||||
#define RADIOLIB_CC1101_ADC_RETENTION_ON 0b01000000 // 6 6 retain ADC settings in sleep mode
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_0_DB 0b00000000 // 5 4 Rx attenuation: 0 dB (default)
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB
|
||||
#define RADIOLIB_CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB
|
||||
#define RADIOLIB_CC1101_FIFO_THR_TX_61_RX_4 0b00000000 // 3 0 TX fifo threshold: 61, RX fifo threshold: 4
|
||||
#define RADIOLIB_CC1101_FIFO_THR_TX_33_RX_32 0b00000111 // 3 0 TX fifo threshold: 33, RX fifo threshold: 32
|
||||
#define RADIOLIB_CC1101_FIFO_THRESH_TX 33
|
||||
#define RADIOLIB_CC1101_FIFO_THRESH_RX 32
|
||||
|
||||
// RADIOLIB_CC1101_REG_SYNC1
|
||||
#define RADIOLIB_CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB
|
||||
#define RADIOLIB_CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB
|
||||
|
||||
// RADIOLIB_CC1101_REG_SYNC0
|
||||
#define RADIOLIB_CC1101_SYNC_WORD_LSB 0x91 // 7 0 sync word LSB
|
||||
#define RADIOLIB_CC1101_SYNC_WORD_LSB 0x91 // 7 0 sync word LSB
|
||||
|
||||
// RADIOLIB_CC1101_REG_PKTCTRL1
|
||||
#define RADIOLIB_CC1101_PQT 0x00 // 7 5 preamble quality threshold
|
||||
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_OFF 0b00000000 // 3 3 automatic Rx FIFO flush on CRC check fail: disabled (default)
|
||||
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_ON 0b00001000 // 3 3 enabled
|
||||
#define RADIOLIB_CC1101_APPEND_STATUS_OFF 0b00000000 // 2 2 append 2 status bytes to packet: disabled
|
||||
#define RADIOLIB_CC1101_APPEND_STATUS_ON 0b00000100 // 2 2 enabled (default)
|
||||
#define RADIOLIB_CC1101_ADR_CHK_NONE 0b00000000 // 1 0 address check: none (default)
|
||||
#define RADIOLIB_CC1101_ADR_CHK_NO_BROADCAST 0b00000001 // 1 0 without broadcast
|
||||
#define RADIOLIB_CC1101_ADR_CHK_SINGLE_BROADCAST 0b00000010 // 1 0 broadcast address 0x00
|
||||
#define RADIOLIB_CC1101_ADR_CHK_DOUBLE_BROADCAST 0b00000011 // 1 0 broadcast addresses 0x00 and 0xFF
|
||||
#define RADIOLIB_CC1101_PQT 0x00 // 7 5 preamble quality threshold
|
||||
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_OFF 0b00000000 // 3 3 automatic Rx FIFO flush on CRC check fail: disabled (default)
|
||||
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_ON 0b00001000 // 3 3 enabled
|
||||
#define RADIOLIB_CC1101_APPEND_STATUS_OFF 0b00000000 // 2 2 append 2 status bytes to packet: disabled
|
||||
#define RADIOLIB_CC1101_APPEND_STATUS_ON 0b00000100 // 2 2 enabled (default)
|
||||
#define RADIOLIB_CC1101_ADR_CHK_NONE 0b00000000 // 1 0 address check: none (default)
|
||||
#define RADIOLIB_CC1101_ADR_CHK_NO_BROADCAST 0b00000001 // 1 0 without broadcast
|
||||
#define RADIOLIB_CC1101_ADR_CHK_SINGLE_BROADCAST 0b00000010 // 1 0 broadcast address 0x00
|
||||
#define RADIOLIB_CC1101_ADR_CHK_DOUBLE_BROADCAST 0b00000011 // 1 0 broadcast addresses 0x00 and 0xFF
|
||||
|
||||
// RADIOLIB_CC1101_REG_PKTCTRL0
|
||||
#define RADIOLIB_CC1101_WHITE_DATA_OFF 0b00000000 // 6 6 data whitening: disabled
|
||||
#define RADIOLIB_CC1101_WHITE_DATA_ON 0b01000000 // 6 6 enabled (default)
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_NORMAL 0b00000000 // 5 4 packet format: normal (FIFOs)
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_SYNCHRONOUS 0b00010000 // 5 4 synchronous serial
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_RANDOM 0b00100000 // 5 4 random transmissions
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_ASYNCHRONOUS 0b00110000 // 5 4 asynchronous serial
|
||||
#define RADIOLIB_CC1101_CRC_OFF 0b00000000 // 2 2 CRC disabled
|
||||
#define RADIOLIB_CC1101_CRC_ON 0b00000100 // 2 2 CRC enabled (default)
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_FIXED 0b00000000 // 1 0 packet length: fixed
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE 0b00000001 // 1 0 variable (default)
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_INFINITE 0b00000010 // 1 0 infinite
|
||||
#define RADIOLIB_CC1101_WHITE_DATA_OFF 0b00000000 // 6 6 data whitening: disabled
|
||||
#define RADIOLIB_CC1101_WHITE_DATA_ON 0b01000000 // 6 6 enabled (default)
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_NORMAL 0b00000000 // 5 4 packet format: normal (FIFOs)
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_SYNCHRONOUS 0b00010000 // 5 4 synchronous serial
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_RANDOM 0b00100000 // 5 4 random transmissions
|
||||
#define RADIOLIB_CC1101_PKT_FORMAT_ASYNCHRONOUS 0b00110000 // 5 4 asynchronous serial
|
||||
#define RADIOLIB_CC1101_CRC_OFF 0b00000000 // 2 2 CRC disabled
|
||||
#define RADIOLIB_CC1101_CRC_ON 0b00000100 // 2 2 CRC enabled (default)
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_FIXED 0b00000000 // 1 0 packet length: fixed
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE 0b00000001 // 1 0 variable (default)
|
||||
#define RADIOLIB_CC1101_LENGTH_CONFIG_INFINITE 0b00000010 // 1 0 infinite
|
||||
|
||||
// RADIOLIB_CC1101_REG_ADDR
|
||||
#define RADIOLIB_CC1101_DEVICE_ADDR 0x00 // 7 0 device address
|
||||
#define RADIOLIB_CC1101_DEVICE_ADDR 0x00 // 7 0 device address
|
||||
|
||||
// RADIOLIB_CC1101_REG_CHANNR
|
||||
#define RADIOLIB_CC1101_CHAN 0x00 // 7 0 channel number
|
||||
#define RADIOLIB_CC1101_CHAN 0x00 // 7 0 channel number
|
||||
|
||||
// RADIOLIB_CC1101_REG_FSCTRL1
|
||||
#define RADIOLIB_CC1101_FREQ_IF 0x0F // 4 0 IF frequency setting; f_IF = (f(XOSC) / 2^10) * CC1101_FREQ_IF
|
||||
#define RADIOLIB_CC1101_FREQ_IF 0x0F // 4 0 IF frequency setting; f_IF = (f(XOSC) / 2^10) * CC1101_FREQ_IF
|
||||
|
||||
// CC1101_REG_FSCTRL0
|
||||
#define RADIOLIB_CC1101_FREQOFF 0x00 // 7 0 base frequency offset (2s-compliment)
|
||||
#define RADIOLIB_CC1101_FREQOFF 0x00 // 7 0 base frequency offset (2s-compliment)
|
||||
|
||||
// RADIOLIB_CC1101_REG_FREQ2 + REG_FREQ1 + REG_FREQ0
|
||||
#define RADIOLIB_CC1101_FREQ_MSB 0x1E // 5 0 base frequency setting: f_carrier = (f(XOSC) / 2^16) * FREQ
|
||||
#define RADIOLIB_CC1101_FREQ_MID 0xC4 // 7 0 where f(XOSC) = 26 MHz
|
||||
#define RADIOLIB_CC1101_FREQ_LSB 0xEC // 7 0 FREQ = 3-byte value of FREQ registers
|
||||
#define RADIOLIB_CC1101_FREQ_MSB 0x1E // 5 0 base frequency setting: f_carrier = (f(XOSC) / 2^16) * FREQ
|
||||
#define RADIOLIB_CC1101_FREQ_MID 0xC4 // 7 0 where f(XOSC) = 26 MHz
|
||||
#define RADIOLIB_CC1101_FREQ_LSB 0xEC // 7 0 FREQ = 3-byte value of FREQ registers
|
||||
|
||||
// RADIOLIB_CC1101_REG_MDMCFG4
|
||||
#define RADIOLIB_CC1101_CHANBW_E 0b10000000 // 7 6 channel bandwidth: BW_channel = f(XOSC) / (8 * (4 + CHANBW_M)*2^CHANBW_E) [Hz]
|
||||
#define RADIOLIB_CC1101_CHANBW_M 0b00000000 // 5 4 default value for 26 MHz crystal: 203 125 Hz
|
||||
#define RADIOLIB_CC1101_DRATE_E 0x0C // 3 0 symbol rate: R_data = (((256 + DRATE_M) * 2^DRATE_E) / 2^28) * f(XOSC) [Baud]
|
||||
#define RADIOLIB_CC1101_CHANBW_E 0b10000000 // 7 6 channel bandwidth: BW_channel = f(XOSC) / (8 * (4 + CHANBW_M)*2^CHANBW_E) [Hz]
|
||||
#define RADIOLIB_CC1101_CHANBW_M 0b00000000 // 5 4 default value for 26 MHz crystal: 203 125 Hz
|
||||
#define RADIOLIB_CC1101_DRATE_E 0x0C // 3 0 symbol rate: R_data = (((256 + DRATE_M) * 2^DRATE_E) / 2^28) * f(XOSC) [Baud]
|
||||
|
||||
// RADIOLIB_CC1101_REG_MDMCFG3
|
||||
#define RADIOLIB_CC1101_DRATE_M 0x22 // 7 0 default value for 26 MHz crystal: 115 051 Baud
|
||||
#define RADIOLIB_CC1101_DRATE_M 0x22 // 7 0 default value for 26 MHz crystal: 115 051 Baud
|
||||
|
||||
// RADIOLIB_CC1101_REG_MDMCFG2
|
||||
#define RADIOLIB_CC1101_DEM_DCFILT_OFF 0b10000000 // 7 7 digital DC filter: disabled
|
||||
#define RADIOLIB_CC1101_DEM_DCFILT_ON 0b00000000 // 7 7 enabled - only for data rates above 250 kBaud (default)
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_2_FSK 0b00000000 // 6 4 modulation format: 2-FSK (default)
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_GFSK 0b00010000 // 6 4 GFSK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK 0b00110000 // 6 4 ASK/OOK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_4_FSK 0b01000000 // 6 4 4-FSK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_MFSK 0b01110000 // 6 4 MFSK - only for data rates above 26 kBaud
|
||||
#define RADIOLIB_CC1101_MANCHESTER_EN_OFF 0b00000000 // 3 3 Manchester encoding: disabled (default)
|
||||
#define RADIOLIB_CC1101_MANCHESTER_EN_ON 0b00001000 // 3 3 enabled
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_NONE 0b00000000 // 2 0 synchronization: no preamble/sync
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_15_16 0b00000001 // 2 0 15/16 sync word bits
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_16_16 0b00000010 // 2 0 16/16 sync word bits (default)
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_30_32 0b00000011 // 2 0 30/32 sync word bits
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_NONE_THR 0b00000100 // 2 0 no preamble sync, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_15_16_THR 0b00000101 // 2 0 15/16 sync word bits, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_16_16_THR 0b00000110 // 2 0 16/16 sync word bits, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_30_32_THR 0b00000111 // 2 0 30/32 sync word bits, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_DEM_DCFILT_OFF 0b10000000 // 7 7 digital DC filter: disabled
|
||||
#define RADIOLIB_CC1101_DEM_DCFILT_ON 0b00000000 // 7 7 enabled - only for data rates above 250 kBaud (default)
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_2_FSK 0b00000000 // 6 4 modulation format: 2-FSK (default)
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_GFSK 0b00010000 // 6 4 GFSK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK 0b00110000 // 6 4 ASK/OOK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_4_FSK 0b01000000 // 6 4 4-FSK
|
||||
#define RADIOLIB_CC1101_MOD_FORMAT_MFSK 0b01110000 // 6 4 MFSK - only for data rates above 26 kBaud
|
||||
#define RADIOLIB_CC1101_MANCHESTER_EN_OFF 0b00000000 // 3 3 Manchester encoding: disabled (default)
|
||||
#define RADIOLIB_CC1101_MANCHESTER_EN_ON 0b00001000 // 3 3 enabled
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_NONE 0b00000000 // 2 0 synchronization: no preamble/sync
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_15_16 0b00000001 // 2 0 15/16 sync word bits
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_16_16 0b00000010 // 2 0 16/16 sync word bits (default)
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_30_32 0b00000011 // 2 0 30/32 sync word bits
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_NONE_THR 0b00000100 // 2 0 no preamble sync, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_15_16_THR 0b00000101 // 2 0 15/16 sync word bits, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_16_16_THR 0b00000110 // 2 0 16/16 sync word bits, carrier sense above threshold
|
||||
#define RADIOLIB_CC1101_SYNC_MODE_30_32_THR 0b00000111 // 2 0 30/32 sync word bits, carrier sense above threshold
|
||||
|
||||
// RADIOLIB_CC1101_REG_MDMCFG1
|
||||
#define RADIOLIB_CC1101_FEC_OFF 0b00000000 // 7 7 forward error correction: disabled (default)
|
||||
#define RADIOLIB_CC1101_FEC_ON 0b10000000 // 7 7 enabled - only for fixed packet length
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_2 0b00000000 // 6 4 number of preamble bytes: 2
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_3 0b00010000 // 6 4 3
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_4 0b00100000 // 6 4 4 (default)
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_6 0b00110000 // 6 4 6
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_8 0b01000000 // 6 4 8
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_12 0b01010000 // 6 4 12
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_16 0b01100000 // 6 4 16
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_24 0b01110000 // 6 4 24
|
||||
#define RADIOLIB_CC1101_CHANSPC_E 0x02 // 1 0 channel spacing: df_channel = (f(XOSC) / 2^18) * (256 + CHANSPC_M) * 2^CHANSPC_E [Hz]
|
||||
#define RADIOLIB_CC1101_FEC_OFF 0b00000000 // 7 7 forward error correction: disabled (default)
|
||||
#define RADIOLIB_CC1101_FEC_ON 0b10000000 // 7 7 enabled - only for fixed packet length
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_2 0b00000000 // 6 4 number of preamble bytes: 2
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_3 0b00010000 // 6 4 3
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_4 0b00100000 // 6 4 4 (default)
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_6 0b00110000 // 6 4 6
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_8 0b01000000 // 6 4 8
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_12 0b01010000 // 6 4 12
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_16 0b01100000 // 6 4 16
|
||||
#define RADIOLIB_CC1101_NUM_PREAMBLE_24 0b01110000 // 6 4 24
|
||||
#define RADIOLIB_CC1101_CHANSPC_E 0x02 // 1 0 channel spacing: df_channel = (f(XOSC) / 2^18) * (256 + CHANSPC_M) * 2^CHANSPC_E [Hz]
|
||||
|
||||
// RADIOLIB_CC1101_REG_MDMCFG0
|
||||
#define RADIOLIB_CC1101_CHANSPC_M 0xF8 // 7 0 default value for 26 MHz crystal: 199 951 kHz
|
||||
#define RADIOLIB_CC1101_CHANSPC_M 0xF8 // 7 0 default value for 26 MHz crystal: 199 951 kHz
|
||||
|
||||
// RADIOLIB_CC1101_REG_DEVIATN
|
||||
#define RADIOLIB_CC1101_DEVIATION_E 0b01000000 // 6 4 frequency deviation: f_dev = (f(XOSC) / 2^17) * (8 + DEVIATION_M) * 2^DEVIATION_E [Hz]
|
||||
#define RADIOLIB_CC1101_DEVIATION_M 0b00000111 // 2 0 default value for 26 MHz crystal: +- 47 607 Hz
|
||||
#define RADIOLIB_CC1101_MSK_PHASE_CHANGE_PERIOD 0x07 // 2 0 phase change symbol period fraction: 1 / (MSK_PHASE_CHANGE_PERIOD + 1)
|
||||
#define RADIOLIB_CC1101_DEVIATION_E 0b01000000 // 6 4 frequency deviation: f_dev = (f(XOSC) / 2^17) * (8 + DEVIATION_M) * 2^DEVIATION_E [Hz]
|
||||
#define RADIOLIB_CC1101_DEVIATION_M 0b00000111 // 2 0 default value for 26 MHz crystal: +- 47 607 Hz
|
||||
#define RADIOLIB_CC1101_MSK_PHASE_CHANGE_PERIOD 0x07 // 2 0 phase change symbol period fraction: 1 / (MSK_PHASE_CHANGE_PERIOD + 1)
|
||||
|
||||
// RADIOLIB_CC1101_REG_MCSM2
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_OFF 0b00000000 // 4 4 Rx timeout based on RSSI value: disabled (default)
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_ON 0b00010000 // 4 4 enabled
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_OFF 0b00000000 // 3 3 check for sync word on Rx timeout
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_ON 0b00001000 // 3 3 check for PQI set on Rx timeout
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_OFF 0b00000111 // 2 0 Rx timeout: disabled (default)
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_MAX 0b00000000 // 2 0 max value (actual value depends on WOR_RES, EVENT0 and f(XOSC))
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_OFF 0b00000000 // 4 4 Rx timeout based on RSSI value: disabled (default)
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_ON 0b00010000 // 4 4 enabled
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_OFF 0b00000000 // 3 3 check for sync word on Rx timeout
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_ON 0b00001000 // 3 3 check for PQI set on Rx timeout
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_OFF 0b00000111 // 2 0 Rx timeout: disabled (default)
|
||||
#define RADIOLIB_CC1101_RX_TIMEOUT_MAX 0b00000000 // 2 0 max value (actual value depends on WOR_RES, EVENT0 and f(XOSC))
|
||||
|
||||
// RADIOLIB_CC1101_REG_MCSM1
|
||||
#define RADIOLIB_CC1101_CCA_MODE_ALWAYS 0b00000000 // 5 4 clear channel indication: always
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR 0b00010000 // 5 4 RSSI below threshold
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RX_PKT 0b00100000 // 5 4 unless receiving packet
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR_RX_PKT 0b00110000 // 5 4 RSSI below threshold unless receiving packet (default)
|
||||
#define RADIOLIB_CC1101_RXOFF_IDLE 0b00000000 // 3 2 next mode after packet reception: idle (default)
|
||||
#define RADIOLIB_CC1101_RXOFF_FSTXON 0b00000100 // 3 2 FSTxOn
|
||||
#define RADIOLIB_CC1101_RXOFF_TX 0b00001000 // 3 2 Tx
|
||||
#define RADIOLIB_CC1101_RXOFF_RX 0b00001100 // 3 2 Rx
|
||||
#define RADIOLIB_CC1101_TXOFF_IDLE 0b00000000 // 1 0 next mode after packet transmission: idle (default)
|
||||
#define RADIOLIB_CC1101_TXOFF_FSTXON 0b00000001 // 1 0 FSTxOn
|
||||
#define RADIOLIB_CC1101_TXOFF_TX 0b00000010 // 1 0 Tx
|
||||
#define RADIOLIB_CC1101_TXOFF_RX 0b00000011 // 1 0 Rx
|
||||
#define RADIOLIB_CC1101_CCA_MODE_ALWAYS 0b00000000 // 5 4 clear channel indication: always
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR 0b00010000 // 5 4 RSSI below threshold
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RX_PKT 0b00100000 // 5 4 unless receiving packet
|
||||
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR_RX_PKT 0b00110000 // 5 4 RSSI below threshold unless receiving packet (default)
|
||||
#define RADIOLIB_CC1101_RXOFF_IDLE 0b00000000 // 3 2 next mode after packet reception: idle (default)
|
||||
#define RADIOLIB_CC1101_RXOFF_FSTXON 0b00000100 // 3 2 FSTxOn
|
||||
#define RADIOLIB_CC1101_RXOFF_TX 0b00001000 // 3 2 Tx
|
||||
#define RADIOLIB_CC1101_RXOFF_RX 0b00001100 // 3 2 Rx
|
||||
#define RADIOLIB_CC1101_TXOFF_IDLE 0b00000000 // 1 0 next mode after packet transmission: idle (default)
|
||||
#define RADIOLIB_CC1101_TXOFF_FSTXON 0b00000001 // 1 0 FSTxOn
|
||||
#define RADIOLIB_CC1101_TXOFF_TX 0b00000010 // 1 0 Tx
|
||||
#define RADIOLIB_CC1101_TXOFF_RX 0b00000011 // 1 0 Rx
|
||||
|
||||
// RADIOLIB_CC1101_REG_MCSM0
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_NEVER 0b00000000 // 5 4 automatic calibration: never (default)
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_IDLE_TO_RXTX 0b00010000 // 5 4 every transition from idle to Rx/Tx
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE 0b00100000 // 5 4 every transition from Rx/Tx to idle
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE_4TH 0b00110000 // 5 4 every 4th transition from Rx/Tx to idle
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_1 0b00000000 // 3 2 number of counter expirations before CHP_RDYN goes low: 1 (default)
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_16 0b00000100 // 3 2 16
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_64 0b00001000 // 3 2 64
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_256 0b00001100 // 3 2 256
|
||||
#define RADIOLIB_CC1101_PIN_CTRL_OFF 0b00000000 // 1 1 pin radio control: disabled (default)
|
||||
#define RADIOLIB_CC1101_PIN_CTRL_ON 0b00000010 // 1 1 enabled
|
||||
#define RADIOLIB_CC1101_XOSC_FORCE_OFF 0b00000000 // 0 0 do not force XOSC to remain on in sleep (default)
|
||||
#define RADIOLIB_CC1101_XOSC_FORCE_ON 0b00000001 // 0 0 force XOSC to remain on in sleep
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_NEVER 0b00000000 // 5 4 automatic calibration: never (default)
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_IDLE_TO_RXTX 0b00010000 // 5 4 every transition from idle to Rx/Tx
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE 0b00100000 // 5 4 every transition from Rx/Tx to idle
|
||||
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE_4TH 0b00110000 // 5 4 every 4th transition from Rx/Tx to idle
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_1 0b00000000 // 3 2 number of counter expirations before CHP_RDYN goes low: 1 (default)
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_16 0b00000100 // 3 2 16
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_64 0b00001000 // 3 2 64
|
||||
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_256 0b00001100 // 3 2 256
|
||||
#define RADIOLIB_CC1101_PIN_CTRL_OFF 0b00000000 // 1 1 pin radio control: disabled (default)
|
||||
#define RADIOLIB_CC1101_PIN_CTRL_ON 0b00000010 // 1 1 enabled
|
||||
#define RADIOLIB_CC1101_XOSC_FORCE_OFF 0b00000000 // 0 0 do not force XOSC to remain on in sleep (default)
|
||||
#define RADIOLIB_CC1101_XOSC_FORCE_ON 0b00000001 // 0 0 force XOSC to remain on in sleep
|
||||
|
||||
// RADIOLIB_CC1101_REG_FOCCFG
|
||||
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_OFF 0b00000000 // 5 5 do not freeze frequency compensation until CS goes high
|
||||
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_ON 0b00100000 // 5 5 freeze frequency compensation until CS goes high (default)
|
||||
#define RADIOLIB_CC1101_FOC_PRE_K 0b00000000 // 4 3 frequency compensation loop gain before sync word: K
|
||||
#define RADIOLIB_CC1101_FOC_PRE_2K 0b00001000 // 4 3 2K
|
||||
#define RADIOLIB_CC1101_FOC_PRE_3K 0b00010000 // 4 3 3K (default)
|
||||
#define RADIOLIB_CC1101_FOC_PRE_4K 0b00011000 // 4 3 4K
|
||||
#define RADIOLIB_CC1101_FOC_POST_K 0b00000000 // 2 2 frequency compensation loop gain after sync word: same as FOC_PRE
|
||||
#define RADIOLIB_CC1101_FOC_POST_K_2 0b00000100 // 2 2 K/2 (default)
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 frequency compensation saturation point: no compensation - required for ASK/OOK
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_8 0b00000001 // 1 0 +- BW_chan/8
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_4 0b00000010 // 1 0 +- BW_chan/4 (default)
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_2 0b00000011 // 1 0 +- BW_chan/2
|
||||
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_OFF 0b00000000 // 5 5 do not freeze frequency compensation until CS goes high
|
||||
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_ON 0b00100000 // 5 5 freeze frequency compensation until CS goes high (default)
|
||||
#define RADIOLIB_CC1101_FOC_PRE_K 0b00000000 // 4 3 frequency compensation loop gain before sync word: K
|
||||
#define RADIOLIB_CC1101_FOC_PRE_2K 0b00001000 // 4 3 2K
|
||||
#define RADIOLIB_CC1101_FOC_PRE_3K 0b00010000 // 4 3 3K (default)
|
||||
#define RADIOLIB_CC1101_FOC_PRE_4K 0b00011000 // 4 3 4K
|
||||
#define RADIOLIB_CC1101_FOC_POST_K 0b00000000 // 2 2 frequency compensation loop gain after sync word: same as FOC_PRE
|
||||
#define RADIOLIB_CC1101_FOC_POST_K_2 0b00000100 // 2 2 K/2 (default)
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 frequency compensation saturation point: no compensation - required for ASK/OOK
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_8 0b00000001 // 1 0 +- BW_chan/8
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_4 0b00000010 // 1 0 +- BW_chan/4 (default)
|
||||
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_2 0b00000011 // 1 0 +- BW_chan/2
|
||||
|
||||
// RADIOLIB_CC1101_REG_BSCFG
|
||||
#define RADIOLIB_CC1101_BS_PRE_KI 0b00000000 // 7 6 clock recovery integral gain before sync word: Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_2KI 0b01000000 // 7 6 2Ki (default)
|
||||
#define RADIOLIB_CC1101_BS_PRE_3KI 0b10000000 // 7 6 3Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_4KI 0b11000000 // 7 6 4Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_KP 0b00000000 // 5 4 clock recovery proportional gain before sync word: Kp
|
||||
#define RADIOLIB_CC1101_BS_PRE_2KP 0b00010000 // 5 4 2Kp
|
||||
#define RADIOLIB_CC1101_BS_PRE_3KP 0b00100000 // 5 4 3Kp (default)
|
||||
#define RADIOLIB_CC1101_BS_PRE_4KP 0b00110000 // 5 4 4Kp
|
||||
#define RADIOLIB_CC1101_BS_POST_KI 0b00000000 // 3 3 clock recovery integral gain after sync word: same as BS_PRE
|
||||
#define RADIOLIB_CC1101_BS_POST_KI_2 0b00001000 // 3 3 Ki/2 (default)
|
||||
#define RADIOLIB_CC1101_BS_POST_KP 0b00000000 // 2 2 clock recovery proportional gain after sync word: same as BS_PRE
|
||||
#define RADIOLIB_CC1101_BS_POST_KP_1 0b00000100 // 2 2 Kp (default)
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 data rate compensation saturation point: no compensation
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_3_125 0b00000001 // 1 0 +- 3.125 %
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_6_25 0b00000010 // 1 0 +- 6.25 %
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_12_5 0b00000011 // 1 0 +- 12.5 %
|
||||
#define RADIOLIB_CC1101_BS_PRE_KI 0b00000000 // 7 6 clock recovery integral gain before sync word: Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_2KI 0b01000000 // 7 6 2Ki (default)
|
||||
#define RADIOLIB_CC1101_BS_PRE_3KI 0b10000000 // 7 6 3Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_4KI 0b11000000 // 7 6 4Ki
|
||||
#define RADIOLIB_CC1101_BS_PRE_KP 0b00000000 // 5 4 clock recovery proportional gain before sync word: Kp
|
||||
#define RADIOLIB_CC1101_BS_PRE_2KP 0b00010000 // 5 4 2Kp
|
||||
#define RADIOLIB_CC1101_BS_PRE_3KP 0b00100000 // 5 4 3Kp (default)
|
||||
#define RADIOLIB_CC1101_BS_PRE_4KP 0b00110000 // 5 4 4Kp
|
||||
#define RADIOLIB_CC1101_BS_POST_KI 0b00000000 // 3 3 clock recovery integral gain after sync word: same as BS_PRE
|
||||
#define RADIOLIB_CC1101_BS_POST_KI_2 0b00001000 // 3 3 Ki/2 (default)
|
||||
#define RADIOLIB_CC1101_BS_POST_KP 0b00000000 // 2 2 clock recovery proportional gain after sync word: same as BS_PRE
|
||||
#define RADIOLIB_CC1101_BS_POST_KP_1 0b00000100 // 2 2 Kp (default)
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 data rate compensation saturation point: no compensation
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_3_125 0b00000001 // 1 0 +- 3.125 %
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_6_25 0b00000010 // 1 0 +- 6.25 %
|
||||
#define RADIOLIB_CC1101_BS_LIMIT_12_5 0b00000011 // 1 0 +- 12.5 %
|
||||
|
||||
// RADIOLIB_CC1101_REG_AGCCTRL2
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_0 0b00000000 // 7 6 reduce maximum available DVGA gain: no reduction (default)
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_1 0b01000000 // 7 6 disable top gain setting
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_2 0b10000000 // 7 6 disable top two gain setting
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_3 0b11000000 // 7 6 disable top three gain setting
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_0_DB 0b00000000 // 5 3 reduce maximum LNA gain by: 0 dB (default)
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_2_6_DB 0b00001000 // 5 3 2.6 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_6_1_DB 0b00010000 // 5 3 6.1 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_7_4_DB 0b00011000 // 5 3 7.4 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_9_2_DB 0b00100000 // 5 3 9.2 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_11_5_DB 0b00101000 // 5 3 11.5 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_14_6_DB 0b00110000 // 5 3 14.6 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_17_1_DB 0b00111000 // 5 3 17.1 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_24_DB 0b00000000 // 2 0 average amplitude target for filter: 24 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_27_DB 0b00000001 // 2 0 27 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_30_DB 0b00000010 // 2 0 30 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_33_DB 0b00000011 // 2 0 33 dB (default)
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_36_DB 0b00000100 // 2 0 36 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_38_DB 0b00000101 // 2 0 38 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_40_DB 0b00000110 // 2 0 40 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_42_DB 0b00000111 // 2 0 42 dB
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_0 0b00000000 // 7 6 reduce maximum available DVGA gain: no reduction (default)
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_1 0b01000000 // 7 6 disable top gain setting
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_2 0b10000000 // 7 6 disable top two gain setting
|
||||
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_3 0b11000000 // 7 6 disable top three gain setting
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_0_DB 0b00000000 // 5 3 reduce maximum LNA gain by: 0 dB (default)
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_2_6_DB 0b00001000 // 5 3 2.6 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_6_1_DB 0b00010000 // 5 3 6.1 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_7_4_DB 0b00011000 // 5 3 7.4 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_9_2_DB 0b00100000 // 5 3 9.2 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_11_5_DB 0b00101000 // 5 3 11.5 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_14_6_DB 0b00110000 // 5 3 14.6 dB
|
||||
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_17_1_DB 0b00111000 // 5 3 17.1 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_24_DB 0b00000000 // 2 0 average amplitude target for filter: 24 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_27_DB 0b00000001 // 2 0 27 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_30_DB 0b00000010 // 2 0 30 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_33_DB 0b00000011 // 2 0 33 dB (default)
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_36_DB 0b00000100 // 2 0 36 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_38_DB 0b00000101 // 2 0 38 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_40_DB 0b00000110 // 2 0 40 dB
|
||||
#define RADIOLIB_CC1101_MAGN_TARGET_42_DB 0b00000111 // 2 0 42 dB
|
||||
|
||||
// RADIOLIB_CC1101_REG_AGCCTRL1
|
||||
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA2 0b00000000 // 6 6 LNA priority setting: LNA2 first
|
||||
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA 0b01000000 // 6 6 LNA first (default)
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_OFF 0b00000000 // 5 4 RSSI relative change to assert carrier sense: disabled (default)
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_6_DB 0b00010000 // 5 4 6 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_10_DB 0b00100000 // 5 4 10 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_14_DB 0b00110000 // 5 4 14 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_ABS_THR 0x00 // 3 0 RSSI threshold to assert carrier sense in 2s compliment, Thr = MAGN_TARGET + CARRIER_SENSE_ABS_TH [dB]
|
||||
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA2 0b00000000 // 6 6 LNA priority setting: LNA2 first
|
||||
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA 0b01000000 // 6 6 LNA first (default)
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_OFF 0b00000000 // 5 4 RSSI relative change to assert carrier sense: disabled (default)
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_6_DB 0b00010000 // 5 4 6 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_10_DB 0b00100000 // 5 4 10 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_14_DB 0b00110000 // 5 4 14 dB
|
||||
#define RADIOLIB_CC1101_CARRIER_SENSE_ABS_THR 0x00 // 3 0 RSSI threshold to assert carrier sense in 2s compliment, Thr = MAGN_TARGET + CARRIER_SENSE_ABS_TH [dB]
|
||||
|
||||
// RADIOLIB_CC1101_REG_AGCCTRL0
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_NONE 0b00000000 // 7 6 AGC hysteresis level: none
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_LOW 0b01000000 // 7 6 low
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_MEDIUM 0b10000000 // 7 6 medium (default)
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_HIGH 0b11000000 // 7 6 high
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_8_SAMPLES 0b00000000 // 5 4 AGC wait time: 8 samples
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_16_SAMPLES 0b00010000 // 5 4 16 samples (default)
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_24_SAMPLES 0b00100000 // 5 4 24 samples
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_32_SAMPLES 0b00110000 // 5 4 32 samples
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_NEVER 0b00000000 // 3 2 freeze AGC gain: never (default)
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_SYNC_WORD 0b00000100 // 3 2 when sync word is found
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_A 0b00001000 // 3 2 manually freeze analog control
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_AD 0b00001100 // 3 2 manually freeze analog and digital control
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_8 0b00000000 // 1 0 averaging length for channel filter: 8 samples
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_16 0b00000001 // 1 0 16 samples (default)
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_32 0b00000010 // 1 0 32 samples
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_64 0b00000011 // 1 0 64 samples
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_4_DB 0b00000000 // 1 0 ASK/OOK decision boundary: 4 dB
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_8_DB 0b00000001 // 1 0 8 dB (default)
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_12_DB 0b00000010 // 1 0 12 dB
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_16_DB 0b00000011 // 1 0 16 dB
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_NONE 0b00000000 // 7 6 AGC hysteresis level: none
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_LOW 0b01000000 // 7 6 low
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_MEDIUM 0b10000000 // 7 6 medium (default)
|
||||
#define RADIOLIB_CC1101_HYST_LEVEL_HIGH 0b11000000 // 7 6 high
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_8_SAMPLES 0b00000000 // 5 4 AGC wait time: 8 samples
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_16_SAMPLES 0b00010000 // 5 4 16 samples (default)
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_24_SAMPLES 0b00100000 // 5 4 24 samples
|
||||
#define RADIOLIB_CC1101_WAIT_TIME_32_SAMPLES 0b00110000 // 5 4 32 samples
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_NEVER 0b00000000 // 3 2 freeze AGC gain: never (default)
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_SYNC_WORD 0b00000100 // 3 2 when sync word is found
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_A 0b00001000 // 3 2 manually freeze analog control
|
||||
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_AD 0b00001100 // 3 2 manually freeze analog and digital control
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_8 0b00000000 // 1 0 averaging length for channel filter: 8 samples
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_16 0b00000001 // 1 0 16 samples (default)
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_32 0b00000010 // 1 0 32 samples
|
||||
#define RADIOLIB_CC1101_FILTER_LENGTH_64 0b00000011 // 1 0 64 samples
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_4_DB 0b00000000 // 1 0 ASK/OOK decision boundary: 4 dB
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_8_DB 0b00000001 // 1 0 8 dB (default)
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_12_DB 0b00000010 // 1 0 12 dB
|
||||
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_16_DB 0b00000011 // 1 0 16 dB
|
||||
|
||||
// RADIOLIB_CC1101_REG_WOREVT1 + REG_WOREVT0
|
||||
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_MSB 0x87 // 7 0 EVENT0 timeout: t_event0 = (750 / f(XOSC)) * EVENT0_TIMEOUT * 2^(5 * WOR_RES) [s]
|
||||
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_LSB 0x6B // 7 0 default value for 26 MHz crystal: 1.0 s
|
||||
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_MSB 0x87 // 7 0 EVENT0 timeout: t_event0 = (750 / f(XOSC)) * EVENT0_TIMEOUT * 2^(5 * WOR_RES) [s]
|
||||
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_LSB 0x6B // 7 0 default value for 26 MHz crystal: 1.0 s
|
||||
|
||||
// RADIOLIB_CC1101_REG_WORCTRL
|
||||
#define RADIOLIB_CC1101_RC_POWER_UP 0b00000000 // 7 7 power up RC oscillator
|
||||
#define RADIOLIB_CC1101_RC_POWER_DOWN 0b10000000 // 7 7 power down RC oscillator
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_4 0b00000000 // 6 4 EVENT1 timeout: 4 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_6 0b00010000 // 6 4 6 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_8 0b00100000 // 6 4 8 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_12 0b00110000 // 6 4 12 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_16 0b01000000 // 6 4 16 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_24 0b01010000 // 6 4 24 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_32 0b01100000 // 6 4 32 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_48 0b01110000 // 6 4 48 RC periods (default)
|
||||
#define RADIOLIB_CC1101_RC_CAL_OFF 0b00000000 // 3 3 disable RC oscillator calibration
|
||||
#define RADIOLIB_CC1101_RC_CAL_ON 0b00001000 // 3 3 enable RC oscillator calibration (default)
|
||||
#define RADIOLIB_CC1101_WOR_RES_1 0b00000000 // 1 0 EVENT0 resolution: 1 period (default)
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_5 0b00000001 // 1 0 2^5 periods
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_10 0b00000010 // 1 0 2^10 periods
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_15 0b00000011 // 1 0 2^15 periods
|
||||
#define RADIOLIB_CC1101_RC_POWER_UP 0b00000000 // 7 7 power up RC oscillator
|
||||
#define RADIOLIB_CC1101_RC_POWER_DOWN 0b10000000 // 7 7 power down RC oscillator
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_4 0b00000000 // 6 4 EVENT1 timeout: 4 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_6 0b00010000 // 6 4 6 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_8 0b00100000 // 6 4 8 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_12 0b00110000 // 6 4 12 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_16 0b01000000 // 6 4 16 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_24 0b01010000 // 6 4 24 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_32 0b01100000 // 6 4 32 RC periods
|
||||
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_48 0b01110000 // 6 4 48 RC periods (default)
|
||||
#define RADIOLIB_CC1101_RC_CAL_OFF 0b00000000 // 3 3 disable RC oscillator calibration
|
||||
#define RADIOLIB_CC1101_RC_CAL_ON 0b00001000 // 3 3 enable RC oscillator calibration (default)
|
||||
#define RADIOLIB_CC1101_WOR_RES_1 0b00000000 // 1 0 EVENT0 resolution: 1 period (default)
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_5 0b00000001 // 1 0 2^5 periods
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_10 0b00000010 // 1 0 2^10 periods
|
||||
#define RADIOLIB_CC1101_WOR_RES_2_15 0b00000011 // 1 0 2^15 periods
|
||||
|
||||
// RADIOLIB_CC1101_REG_FREND1
|
||||
#define RADIOLIB_CC1101_LNA_CURRENT 0x01 // 7 6 front-end LNA PTAT current output adjustment
|
||||
#define RADIOLIB_CC1101_LNA2MIX_CURRENT 0x01 // 5 4 front-end PTAT output adjustment
|
||||
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_RX 0x01 // 3 2 Rx LO buffer current adjustment
|
||||
#define RADIOLIB_CC1101_MIX_CURRENT 0x02 // 1 0 mixer current adjustment
|
||||
#define RADIOLIB_CC1101_LNA_CURRENT 0x01 // 7 6 front-end LNA PTAT current output adjustment
|
||||
#define RADIOLIB_CC1101_LNA2MIX_CURRENT 0x01 // 5 4 front-end PTAT output adjustment
|
||||
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_RX 0x01 // 3 2 Rx LO buffer current adjustment
|
||||
#define RADIOLIB_CC1101_MIX_CURRENT 0x02 // 1 0 mixer current adjustment
|
||||
|
||||
// RADIOLIB_CC1101_REG_FREND0
|
||||
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_TX 0x01 // 5 4 Tx LO buffer current adjustment
|
||||
#define RADIOLIB_CC1101_PA_POWER 0x00 // 2 0 set power amplifier power according to PATABLE
|
||||
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_TX 0x01 // 5 4 Tx LO buffer current adjustment
|
||||
#define RADIOLIB_CC1101_PA_POWER 0x00 // 2 0 set power amplifier power according to PATABLE
|
||||
|
||||
// RADIOLIB_CC1101_REG_FSCAL3
|
||||
#define RADIOLIB_CC1101_CHP_CURR_CAL_OFF 0b00000000 // 5 4 disable charge pump calibration
|
||||
#define RADIOLIB_CC1101_CHP_CURR_CAL_ON 0b00100000 // 5 4 enable charge pump calibration (default)
|
||||
#define RADIOLIB_CC1101_FSCAL3 0x09 // 3 0 charge pump output current: I_out = I_0 * 2^(FSCAL3/4) [A]
|
||||
#define RADIOLIB_CC1101_CHP_CURR_CAL_OFF 0b00000000 // 5 4 disable charge pump calibration
|
||||
#define RADIOLIB_CC1101_CHP_CURR_CAL_ON 0b00100000 // 5 4 enable charge pump calibration (default)
|
||||
#define RADIOLIB_CC1101_FSCAL3 0x09 // 3 0 charge pump output current: I_out = I_0 * 2^(FSCAL3/4) [A]
|
||||
|
||||
// RADIOLIB_CC1101_REG_FSCAL2
|
||||
#define RADIOLIB_CC1101_VCO_CORE_LOW 0b00000000 // 5 5 VCO: low (default)
|
||||
#define RADIOLIB_CC1101_VCO_CORE_HIGH 0b00100000 // 5 5 high
|
||||
#define RADIOLIB_CC1101_FSCAL2 0x0A // 4 0 VCO current result/override
|
||||
#define RADIOLIB_CC1101_VCO_CORE_LOW 0b00000000 // 5 5 VCO: low (default)
|
||||
#define RADIOLIB_CC1101_VCO_CORE_HIGH 0b00100000 // 5 5 high
|
||||
#define RADIOLIB_CC1101_FSCAL2 0x0A // 4 0 VCO current result/override
|
||||
|
||||
// RADIOLIB_CC1101_REG_FSCAL1
|
||||
#define RADIOLIB_CC1101_FSCAL1 0x20 // 5 0 capacitor array setting for coarse VCO tuning
|
||||
#define RADIOLIB_CC1101_FSCAL1 0x20 // 5 0 capacitor array setting for coarse VCO tuning
|
||||
|
||||
// RADIOLIB_CC1101_REG_FSCAL0
|
||||
#define RADIOLIB_CC1101_FSCAL0 0x0D // 6 0 frequency synthesizer calibration setting
|
||||
#define RADIOLIB_CC1101_FSCAL0 0x0D // 6 0 frequency synthesizer calibration setting
|
||||
|
||||
// RADIOLIB_CC1101_REG_RCCTRL1
|
||||
#define RADIOLIB_CC1101_RCCTRL1 0x41 // 6 0 RC oscillator configuration
|
||||
#define RADIOLIB_CC1101_RCCTRL1 0x41 // 6 0 RC oscillator configuration
|
||||
|
||||
// RADIOLIB_CC1101_REG_RCCTRL0
|
||||
#define RADIOLIB_CC1101_RCCTRL0 0x00 // 6 0 RC oscillator configuration
|
||||
#define RADIOLIB_CC1101_RCCTRL0 0x00 // 6 0 RC oscillator configuration
|
||||
|
||||
// RADIOLIB_CC1101_REG_PTEST
|
||||
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_OFF 0x7F // 7 0 temperature sensor will not be available in idle mode (default)
|
||||
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_ON 0xBF // 7 0 temperature sensor will be available in idle mode
|
||||
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_OFF 0x7F // 7 0 temperature sensor will not be available in idle mode (default)
|
||||
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_ON 0xBF // 7 0 temperature sensor will be available in idle mode
|
||||
|
||||
// RADIOLIB_CC1101_REG_TEST0
|
||||
#define RADIOLIB_CC1101_VCO_SEL_CAL_OFF 0b00000000 // 1 1 disable VCO selection calibration stage
|
||||
#define RADIOLIB_CC1101_VCO_SEL_CAL_ON 0b00000010 // 1 1 enable VCO selection calibration stage
|
||||
#define RADIOLIB_CC1101_VCO_SEL_CAL_OFF 0b00000000 // 1 1 disable VCO selection calibration stage
|
||||
#define RADIOLIB_CC1101_VCO_SEL_CAL_ON 0b00000010 // 1 1 enable VCO selection calibration stage
|
||||
|
||||
// RADIOLIB_CC1101_REG_PARTNUM
|
||||
#define RADIOLIB_CC1101_PARTNUM 0x00
|
||||
|
|
@ -473,43 +473,43 @@
|
|||
#define RADIOLIB_CC1101_VERSION_CLONE 0x17
|
||||
|
||||
// RADIOLIB_CC1101_REG_MARCSTATE
|
||||
#define RADIOLIB_CC1101_MARC_STATE_SLEEP 0x00 // 4 0 main radio control state: sleep
|
||||
#define RADIOLIB_CC1101_MARC_STATE_IDLE 0x01 // 4 0 idle
|
||||
#define RADIOLIB_CC1101_MARC_STATE_XOFF 0x02 // 4 0 XOFF
|
||||
#define RADIOLIB_CC1101_MARC_STATE_VCOON_MC 0x03 // 4 0 VCOON_MC
|
||||
#define RADIOLIB_CC1101_MARC_STATE_REGON_MC 0x04 // 4 0 REGON_MC
|
||||
#define RADIOLIB_CC1101_MARC_STATE_MANCAL 0x05 // 4 0 MANCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_VCOON 0x06 // 4 0 VCOON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_REGON 0x07 // 4 0 REGON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_STARTCAL 0x08 // 4 0 STARTCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_BWBOOST 0x09 // 4 0 BWBOOST
|
||||
#define RADIOLIB_CC1101_MARC_STATE_FS_LOCK 0x0A // 4 0 FS_LOCK
|
||||
#define RADIOLIB_CC1101_MARC_STATE_IFADCON 0x0B // 4 0 IFADCON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_ENDCAL 0x0C // 4 0 ENDCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX 0x0D // 4 0 RX
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX_END 0x0E // 4 0 RX_END
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX_RST 0x0F // 4 0 RX_RST
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TXRX_SWITCH 0x10 // 4 0 TXRX_SWITCH
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RXFIFO_OVERFLOW 0x11 // 4 0 RXFIFO_OVERFLOW
|
||||
#define RADIOLIB_CC1101_MARC_STATE_FSTXON 0x12 // 4 0 FSTXON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TX 0x13 // 4 0 TX
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TX_END 0x14 // 4 0 TX_END
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RXTX_SWITCH 0x15 // 4 0 RXTX_SWITCH
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TXFIFO_UNDERFLOW 0x16 // 4 0 TXFIFO_UNDERFLOW
|
||||
#define RADIOLIB_CC1101_MARC_STATE_SLEEP 0x00 // 4 0 main radio control state: sleep
|
||||
#define RADIOLIB_CC1101_MARC_STATE_IDLE 0x01 // 4 0 idle
|
||||
#define RADIOLIB_CC1101_MARC_STATE_XOFF 0x02 // 4 0 XOFF
|
||||
#define RADIOLIB_CC1101_MARC_STATE_VCOON_MC 0x03 // 4 0 VCOON_MC
|
||||
#define RADIOLIB_CC1101_MARC_STATE_REGON_MC 0x04 // 4 0 REGON_MC
|
||||
#define RADIOLIB_CC1101_MARC_STATE_MANCAL 0x05 // 4 0 MANCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_VCOON 0x06 // 4 0 VCOON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_REGON 0x07 // 4 0 REGON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_STARTCAL 0x08 // 4 0 STARTCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_BWBOOST 0x09 // 4 0 BWBOOST
|
||||
#define RADIOLIB_CC1101_MARC_STATE_FS_LOCK 0x0A // 4 0 FS_LOCK
|
||||
#define RADIOLIB_CC1101_MARC_STATE_IFADCON 0x0B // 4 0 IFADCON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_ENDCAL 0x0C // 4 0 ENDCAL
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX 0x0D // 4 0 RX
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX_END 0x0E // 4 0 RX_END
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RX_RST 0x0F // 4 0 RX_RST
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TXRX_SWITCH 0x10 // 4 0 TXRX_SWITCH
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RXFIFO_OVERFLOW 0x11 // 4 0 RXFIFO_OVERFLOW
|
||||
#define RADIOLIB_CC1101_MARC_STATE_FSTXON 0x12 // 4 0 FSTXON
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TX 0x13 // 4 0 TX
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TX_END 0x14 // 4 0 TX_END
|
||||
#define RADIOLIB_CC1101_MARC_STATE_RXTX_SWITCH 0x15 // 4 0 RXTX_SWITCH
|
||||
#define RADIOLIB_CC1101_MARC_STATE_TXFIFO_UNDERFLOW 0x16 // 4 0 TXFIFO_UNDERFLOW
|
||||
|
||||
// RADIOLIB_CC1101_REG_WORTIME1 + REG_WORTIME0
|
||||
#define RADIOLIB_CC1101_WORTIME_MSB 0x00 // 7 0 WOR timer value
|
||||
#define RADIOLIB_CC1101_WORTIME_LSB 0x00 // 7 0
|
||||
#define RADIOLIB_CC1101_WORTIME_MSB 0x00 // 7 0 WOR timer value
|
||||
#define RADIOLIB_CC1101_WORTIME_LSB 0x00 // 7 0
|
||||
|
||||
// RADIOLIB_CC1101_REG_PKTSTATUS
|
||||
#define RADIOLIB_CC1101_CRC_OK 0b10000000 // 7 7 CRC check passed
|
||||
#define RADIOLIB_CC1101_CRC_ERROR 0b00000000 // 7 7 CRC check failed
|
||||
#define RADIOLIB_CC1101_CS 0b01000000 // 6 6 carrier sense
|
||||
#define RADIOLIB_CC1101_PQT_REACHED 0b00100000 // 5 5 preamble quality reached
|
||||
#define RADIOLIB_CC1101_CCA 0b00010000 // 4 4 channel clear
|
||||
#define RADIOLIB_CC1101_SFD 0b00001000 // 3 3 start of frame delimiter - sync word received
|
||||
#define RADIOLIB_CC1101_GDO2_ACTIVE 0b00000100 // 2 2 GDO2 is active/asserted
|
||||
#define RADIOLIB_CC1101_GDO0_ACTIVE 0b00000001 // 0 0 GDO0 is active/asserted
|
||||
#define RADIOLIB_CC1101_CRC_OK 0b10000000 // 7 7 CRC check passed
|
||||
#define RADIOLIB_CC1101_CRC_ERROR 0b00000000 // 7 7 CRC check failed
|
||||
#define RADIOLIB_CC1101_CS 0b01000000 // 6 6 carrier sense
|
||||
#define RADIOLIB_CC1101_PQT_REACHED 0b00100000 // 5 5 preamble quality reached
|
||||
#define RADIOLIB_CC1101_CCA 0b00010000 // 4 4 channel clear
|
||||
#define RADIOLIB_CC1101_SFD 0b00001000 // 3 3 start of frame delimiter - sync word received
|
||||
#define RADIOLIB_CC1101_GDO2_ACTIVE 0b00000100 // 2 2 GDO2 is active/asserted
|
||||
#define RADIOLIB_CC1101_GDO0_ACTIVE 0b00000001 // 0 0 GDO0 is active/asserted
|
||||
|
||||
// RadioLib defaults
|
||||
#define RADIOLIB_CC1101_DEFAULT_FREQ 434.0
|
||||
|
|
@ -525,7 +525,7 @@
|
|||
\class CC1101
|
||||
\brief Control class for %CC1101 module.
|
||||
*/
|
||||
class CC1101: public PhysicalLayer {
|
||||
class CC1101 : public PhysicalLayer {
|
||||
public:
|
||||
// introduce PhysicalLayer overloads
|
||||
using PhysicalLayer::transmit;
|
||||
|
|
@ -559,7 +559,7 @@ class CC1101: public PhysicalLayer {
|
|||
float rxBw = RADIOLIB_CC1101_DEFAULT_RXBW,
|
||||
int8_t pwr = RADIOLIB_CC1101_DEFAULT_POWER,
|
||||
uint8_t preambleLength = RADIOLIB_CC1101_DEFAULT_PREAMBLELEN);
|
||||
|
||||
|
||||
/*!
|
||||
\brief Initialization method for 4-FSK modulation.
|
||||
\param freq Carrier frequency in MHz. Defaults to 434 MHz.
|
||||
|
|
@ -620,7 +620,7 @@ class CC1101: public PhysicalLayer {
|
|||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t sleep() override;
|
||||
|
||||
|
||||
/*!
|
||||
\brief Starts synchronous direct mode transmission.
|
||||
\param frf Raw RF frequency value. Defaults to 0, required for quick frequency shifts in RTTY.
|
||||
|
|
@ -703,8 +703,8 @@ class CC1101: public PhysicalLayer {
|
|||
|
||||
/*!
|
||||
\brief Interrupt-driven binary transmit method for packets less than 64 bytes.
|
||||
Method blocks for packets longer than 64 bytes up to a 255 byte limit, until
|
||||
the last bytes are placed in the FIFO. Some limitations and issues apply; see discussion:
|
||||
Method blocks for packets longer than 64 bytes up to a 255 byte limit, until
|
||||
the last bytes are placed in the FIFO. Some limitations and issues apply; see discussion:
|
||||
https://github.com/jgromes/RadioLib/discussions/1138
|
||||
Overloads for string-based transmissions are implemented in PhysicalLayer.
|
||||
\param data Binary data to be sent.
|
||||
|
|
@ -778,12 +778,12 @@ class CC1101: public PhysicalLayer {
|
|||
*/
|
||||
int16_t setRxBandwidth(float rxBw);
|
||||
|
||||
/*!
|
||||
\brief calculates and sets Rx bandwidth based on the freq, baud and freq uncertainty.
|
||||
Reimplement of atlas0fd00m's (RfCat) CalculatePktChanBw function.
|
||||
Modified for worse ppm with the CC1101, and adjusted for the supportted CC1101 bw.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
/*!
|
||||
\brief calculates and sets Rx bandwidth based on the freq, baud and freq uncertainty.
|
||||
Reimplement of atlas0fd00m's (RfCat) CalculatePktChanBw function.
|
||||
Modified for worse ppm with the CC1101, and adjusted for the supportted CC1101 bw.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t autoSetRxBandwidth();
|
||||
|
||||
/*!
|
||||
|
|
@ -794,11 +794,11 @@ class CC1101: public PhysicalLayer {
|
|||
int16_t setFrequencyDeviation(float freqDev) override;
|
||||
|
||||
/*!
|
||||
\brief Gets frequency deviation.
|
||||
\brief Gets frequency deviation.
|
||||
\param[out] freqDev Pointer to variable where to save the frequency deviation.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t getFrequencyDeviation(float *freqDev);
|
||||
int16_t getFrequencyDeviation(float* freqDev);
|
||||
|
||||
/*!
|
||||
\brief Sets output power. Allowed values are -30, -20, -15, -10, 0, 5, 7 or 10 dBm.
|
||||
|
|
@ -940,7 +940,7 @@ class CC1101: public PhysicalLayer {
|
|||
int16_t setPromiscuousMode(bool enable = true, bool requireCarrierSense = false);
|
||||
|
||||
/*!
|
||||
\brief Get whether the modem is in promiscuous mode: no packet filtering
|
||||
\brief Get whether the modem is in promiscuous mode: no packet filtering
|
||||
(e.g., no preamble, sync word, address, CRC).
|
||||
\returns Whether the modem is in promiscuous mode.
|
||||
*/
|
||||
|
|
@ -1003,9 +1003,9 @@ class CC1101: public PhysicalLayer {
|
|||
*/
|
||||
int16_t setDIOMapping(uint32_t pin, uint32_t value) override;
|
||||
|
||||
#if !RADIOLIB_GODMODE && !RADIOLIB_LOW_LEVEL
|
||||
protected:
|
||||
#endif
|
||||
#if !RADIOLIB_GODMODE && !RADIOLIB_LOW_LEVEL
|
||||
protected:
|
||||
#endif
|
||||
Module* getMod() override;
|
||||
|
||||
// SPI read overrides to set bit for burst write and status registers access
|
||||
|
|
@ -1018,9 +1018,9 @@ class CC1101: public PhysicalLayer {
|
|||
|
||||
void SPIsendCommand(uint8_t cmd);
|
||||
|
||||
#if !RADIOLIB_GODMODE
|
||||
private:
|
||||
#endif
|
||||
#if !RADIOLIB_GODMODE
|
||||
private:
|
||||
#endif
|
||||
Module* mod;
|
||||
|
||||
float frequency = RADIOLIB_CC1101_DEFAULT_FREQ;
|
||||
|
|
@ -1044,7 +1044,7 @@ class CC1101: public PhysicalLayer {
|
|||
int16_t transmitDirect(bool sync, uint32_t frf);
|
||||
int16_t receiveDirect(bool sync);
|
||||
int16_t directMode(bool sync);
|
||||
static void getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t& exp, uint8_t& mant);
|
||||
static void getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t &exp, uint8_t &mant);
|
||||
int16_t setPacketMode(uint8_t mode, uint16_t len);
|
||||
};
|
||||
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue