Pi Firmware: Make second PSYNC read conditional on the sample width (skip in PSYNC x2 mode)

Change-Id: I12921e7c649281f8925cce3aa7d4e65f2fa627f6
pull/39/head
David Banks 2019-03-09 11:52:59 +00:00
rodzic fdc1f66415
commit 6081827479
3 zmienionych plików z 33 dodań i 18 usunięć

Wyświetl plik

@ -70,8 +70,12 @@
#define BIT_ODD_SAMPLES 0x02000000 // bit 25, if set only use odd samples
#define BIT_EVEN_SAMPLES 0x04000000 // bit 26, if set only use even samples
#define BIT_PSYNC_DOUBLE_READ 0x08000000 // bit 27, indicates PSYNC needs to be read twice, once to find the edge
// then a second time to capture stable data. The v3 CPLD delays PSYNC a
// couple of cycles, so the read that sees the edge will always capture
// stable data. The second read is skipped in this case.
// bits 27-31 unused
// bits 28-31 unused
// R0 return value bits
#define RET_SW1 0x02

Wyświetl plik

@ -9,6 +9,15 @@ wait\@:
tst r8, #PSYNC_MASK
bne wait\@
// Read a second time to capture stable data
// This is executed only if the sample_width is 0 (=3 bits)
// It could be done on CPLD version, but this was easier
tst r3, #BIT_PSYNC_DOUBLE_READ
ldrne r8, [r4]
eorne r8, r3
tstne r8, #PSYNC_MASK
bne wait\@
// toggle the polarity to look for the opposite edge next time
eor r8, r3
eor r3, #PSYNC_MASK
@ -571,5 +580,3 @@ waithi\@:
tstge r5, #1 // 1 = auto repeat rate
orreq r0, #\ret // Indicate the auto repeated press in the result
.endm

Wyświetl plik

@ -139,6 +139,10 @@ skip_swap:
addne r8, r8, #1
str r8, param_h_offset
// If the sample width is 0 (3 bits) do the second PSYNC read
// (maintains backwards compatibility with CPLDv1 and CPLDv2)
orreq r3, r3, #BIT_PSYNC_DOUBLE_READ
ldr r8, param_palette_control
cmp r8, #2
movgt r8, #2