From 6081827479ea71559ed6b56dc0d30d36b2f9d0ab Mon Sep 17 00:00:00 2001 From: David Banks Date: Sat, 9 Mar 2019 11:52:59 +0000 Subject: [PATCH] Pi Firmware: Make second PSYNC read conditional on the sample width (skip in PSYNC x2 mode) Change-Id: I12921e7c649281f8925cce3aa7d4e65f2fa627f6 --- src/defs.h | 6 +++++- src/macros.S | 11 +++++++++-- src/rgb_to_fb.S | 34 +++++++++++++++++++--------------- 3 files changed, 33 insertions(+), 18 deletions(-) diff --git a/src/defs.h b/src/defs.h index 29578652..0db5ce82 100644 --- a/src/defs.h +++ b/src/defs.h @@ -70,8 +70,12 @@ #define BIT_ODD_SAMPLES 0x02000000 // bit 25, if set only use odd samples #define BIT_EVEN_SAMPLES 0x04000000 // bit 26, if set only use even samples +#define BIT_PSYNC_DOUBLE_READ 0x08000000 // bit 27, indicates PSYNC needs to be read twice, once to find the edge + // then a second time to capture stable data. The v3 CPLD delays PSYNC a + // couple of cycles, so the read that sees the edge will always capture + // stable data. The second read is skipped in this case. - // bits 27-31 unused + // bits 28-31 unused // R0 return value bits #define RET_SW1 0x02 diff --git a/src/macros.S b/src/macros.S index 5820d371..9e115f2e 100644 --- a/src/macros.S +++ b/src/macros.S @@ -9,6 +9,15 @@ wait\@: tst r8, #PSYNC_MASK bne wait\@ + // Read a second time to capture stable data + // This is executed only if the sample_width is 0 (=3 bits) + // It could be done on CPLD version, but this was easier + tst r3, #BIT_PSYNC_DOUBLE_READ + ldrne r8, [r4] + eorne r8, r3 + tstne r8, #PSYNC_MASK + bne wait\@ + // toggle the polarity to look for the opposite edge next time eor r8, r3 eor r3, #PSYNC_MASK @@ -571,5 +580,3 @@ waithi\@: tstge r5, #1 // 1 = auto repeat rate orreq r0, #\ret // Indicate the auto repeated press in the result .endm - - diff --git a/src/rgb_to_fb.S b/src/rgb_to_fb.S index 3c81cb72..437ed08b 100644 --- a/src/rgb_to_fb.S +++ b/src/rgb_to_fb.S @@ -132,22 +132,26 @@ skip_swap: orreq r3, r3, r10 #endif - ldr r8, param_h_offset - ldr r9, param_sample_width - ands r9, r9, #1 - movne r8, r8, lsl #1 - addne r8, r8, #1 - str r8, param_h_offset + ldr r8, param_h_offset + ldr r9, param_sample_width + ands r9, r9, #1 + movne r8, r8, lsl #1 + addne r8, r8, #1 + str r8, param_h_offset - ldr r8, param_palette_control - cmp r8, #2 - movgt r8, #2 - mov r8, r8, lsl #1 - orr r8, r8, r9 - ldr r9, param_capture_line - add r9, r9, r8, lsl #2 - ldr r8, [r9] - str r8, capture_address + // If the sample width is 0 (3 bits) do the second PSYNC read + // (maintains backwards compatibility with CPLDv1 and CPLDv2) + orreq r3, r3, #BIT_PSYNC_DOUBLE_READ + + ldr r8, param_palette_control + cmp r8, #2 + movgt r8, #2 + mov r8, r8, lsl #1 + orr r8, r8, r9 + ldr r9, param_capture_line + add r9, r9, r8, lsl #2 + ldr r8, [r9] + str r8, capture_address ldr r8, =sentinel ldr r9, =0x48444d49 // "HDMI" sentinel