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RGBtoHDMI
kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
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Update 24Mhz CPLD to V7.6

pull/158/head
IanSB 2020-09-30 16:08:19 +01:00
rodzic 25b701c5d6
commit 300fd29dd3
1 zmienionych plików z 4 dodań i 5 usunięć
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vhdl/RGBtoHDMI.vhdl
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@ -64,8 +64,8 @@ architecture Behavorial of RGBtoHDMI is
-- 4 = RGB CPLD (TTL)
-- C = RGB CPLD (Analog)
constant VERSION_NUM_BBC : std_logic_vector(11 downto 0) := x"066";
constant VERSION_NUM_RGB_TTL : std_logic_vector(11 downto 0) := x"475";
constant VERSION_NUM_RGB_ANALOG : std_logic_vector(11 downto 0) := x"C75";
constant VERSION_NUM_RGB_TTL : std_logic_vector(11 downto 0) := x"476";
constant VERSION_NUM_RGB_ANALOG : std_logic_vector(11 downto 0) := x"C76";
-- Sampling points
constant INIT_SAMPLING_POINTS : std_logic_vector(23 downto 0) := "000000011011011011011011";
@ -146,8 +146,6 @@ architecture Behavorial of RGBtoHDMI is
begin
old_mux <= mux when not(SupportAnalog) else '0';
mode7 <= mode7_in when not(SupportAnalog) else rate(1) or not(rate(0));
R <= R1 when old_mux = '1' else R0;
G <= G1 when old_mux = '1' else G0;
B <= B1 when old_mux = '1' else B0;
@ -161,7 +159,8 @@ begin
half <= sp_reg(18);
delay <= unsigned(sp_reg(20 downto 19));
rate <= sp_reg(22 downto 21);
invert <= sp_reg(23);
invert <= sp_reg(23) when not(SupportAnalog) else '0';
mode7 <= mode7_in when not(SupportAnalog) else sp_reg(23);
-- Shift the bits in LSB first
process(sp_clk)