kopia lustrzana https://github.com/OpenRTX/OpenRTX
122 wiersze
6.7 KiB
C
122 wiersze
6.7 KiB
C
/*
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* sys/irq.h --- STM32F4 IRQ numbers.
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*
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* Copyright (C) 2012, Galois, Inc.
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* All Rights Reserved.
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*
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* This software is released under the "BSD3" license. Read the file
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* "LICENSE" for more information.
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*/
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#ifndef __hwfr_sys_irq_h
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#define __hwfr_sys_irq_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* IRQ Definition
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*/
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enum IRQn {
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/****** Cortex-M4 Processor Exceptions Numbers * *****************************/
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NonMaskableInt_IRQn = -14, // Non Maskable Interrupt
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MemoryManagement_IRQn = -12, // Cortex-M4 Memory Management Interrupt
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BusFault_IRQn = -11, // Cortex-M4 Bus Fault Interrupt
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UsageFault_IRQn = -10, // Cortex-M4 Usage Fault Interrupt
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SVCall_IRQn = -5, // Cortex-M4 SV Call Interrupt
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DebugMonitor_IRQn = -4, // Cortex-M4 Debug Monitor Interrupt
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PendSV_IRQn = -2, // Cortex-M4 Pend SV Interrupt
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SysTick_IRQn = -1, // Cortex-M4 System Tick Interrupt
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/****** STM32 specific Interrupt Numbers *************************************/
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WWDG_IRQn = 0, // Window WatchDog Interrupt
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PVD_IRQn = 1, // PVD through EXTI Line detection Interrupt
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TAMP_STAMP_IRQn = 2, // Tamper and TimeStamp interrupts through the EXTI line
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RTC_WKUP_IRQn = 3, // RTC Wakeup interrupt through the EXTI line
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FLASH_IRQn = 4, // FLASH global Interrupt
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RCC_IRQn = 5, // RCC global Interrupt
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EXTI0_IRQn = 6, // EXTI Line0 Interrupt
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EXTI1_IRQn = 7, // EXTI Line1 Interrupt
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EXTI2_IRQn = 8, // EXTI Line2 Interrupt
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EXTI3_IRQn = 9, // EXTI Line3 Interrupt
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EXTI4_IRQn = 10, // EXTI Line4 Interrupt
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DMA1_Stream0_IRQn = 11, // DMA1 Stream 0 global Interrupt
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DMA1_Stream1_IRQn = 12, // DMA1 Stream 1 global Interrupt
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DMA1_Stream2_IRQn = 13, // DMA1 Stream 2 global Interrupt
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DMA1_Stream3_IRQn = 14, // DMA1 Stream 3 global Interrupt
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DMA1_Stream4_IRQn = 15, // DMA1 Stream 4 global Interrupt
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DMA1_Stream5_IRQn = 16, // DMA1 Stream 5 global Interrupt
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DMA1_Stream6_IRQn = 17, // DMA1 Stream 6 global Interrupt
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ADC_IRQn = 18, // ADC1, ADC2 and ADC3 global Interrupts
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CAN1_TX_IRQn = 19, // CAN1 TX Interrupt
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CAN1_RX0_IRQn = 20, // CAN1 RX0 Interrupt
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CAN1_RX1_IRQn = 21, // CAN1 RX1 Interrupt
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CAN1_SCE_IRQn = 22, // CAN1 SCE Interrupt
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EXTI9_5_IRQn = 23, // External Line[9:5] Interrupts
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TIM1_BRK_TIM9_IRQn = 24, // TIM1 Break interrupt and TIM9 global interrupt
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TIM1_UP_TIM10_IRQn = 25, // TIM1 Update Interrupt and TIM10 global interrupt
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TIM1_TRG_COM_TIM11_IRQn = 26, // TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt
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TIM1_CC_IRQn = 27, // TIM1 Capture Compare Interrupt
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TIM2_IRQn = 28, // TIM2 global Interrupt
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TIM3_IRQn = 29, // TIM3 global Interrupt
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TIM4_IRQn = 30, // TIM4 global Interrupt
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I2C1_EV_IRQn = 31, // I2C1 Event Interrupt
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I2C1_ER_IRQn = 32, // I2C1 Error Interrupt
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I2C2_EV_IRQn = 33, // I2C2 Event Interrupt
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I2C2_ER_IRQn = 34, // I2C2 Error Interrupt
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SPI1_IRQn = 35, // SPI1 global Interrupt
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SPI2_IRQn = 36, // SPI2 global Interrupt
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USART1_IRQn = 37, // USART1 global Interrupt
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USART2_IRQn = 38, // USART2 global Interrupt
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USART3_IRQn = 39, // USART3 global Interrupt
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EXTI15_10_IRQn = 40, // External Line[15:10] Interrupts
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RTC_Alarm_IRQn = 41, // RTC Alarm (A and B) through EXTI Line Interrupt
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OTG_FS_WKUP_IRQn = 42, // USB OTG FS Wakeup through EXTI line interrupt
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TIM8_BRK_TIM12_IRQn = 43, // TIM8 Break Interrupt and TIM12 global interrupt
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TIM8_UP_TIM13_IRQn = 44, // TIM8 Update Interrupt and TIM13 global interrupt
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TIM8_TRG_COM_TIM14_IRQn = 45, // TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
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TIM8_CC_IRQn = 46, // TIM8 Capture Compare Interrupt
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DMA1_Stream7_IRQn = 47, // DMA1 Stream7 Interrupt
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FSMC_IRQn = 48, // FSMC global Interrupt
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SDIO_IRQn = 49, // SDIO global Interrupt
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TIM5_IRQn = 50, // TIM5 global Interrupt
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SPI3_IRQn = 51, // SPI3 global Interrupt
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UART4_IRQn = 52, // UART4 global Interrupt
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UART5_IRQn = 53, // UART5 global Interrupt
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TIM6_DAC_IRQn = 54, // TIM6 global and DAC1&2 underrun error interrupts
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TIM7_IRQn = 55, // TIM7 global interrupt
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DMA2_Stream0_IRQn = 56, // DMA2 Stream 0 global Interrupt
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DMA2_Stream1_IRQn = 57, // DMA2 Stream 1 global Interrupt
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DMA2_Stream2_IRQn = 58, // DMA2 Stream 2 global Interrupt
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DMA2_Stream3_IRQn = 59, // DMA2 Stream 3 global Interrupt
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DMA2_Stream4_IRQn = 60, // DMA2 Stream 4 global Interrupt
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ETH_IRQn = 61, // Ethernet global Interrupt
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ETH_WKUP_IRQn = 62, // Ethernet Wakeup through EXTI line Interrupt
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CAN2_TX_IRQn = 63, // CAN2 TX Interrupt
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CAN2_RX0_IRQn = 64, // CAN2 RX0 Interrupt
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CAN2_RX1_IRQn = 65, // CAN2 RX1 Interrupt
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CAN2_SCE_IRQn = 66, // CAN2 SCE Interrupt
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OTG_FS_IRQn = 67, // USB OTG FS global Interrupt
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DMA2_Stream5_IRQn = 68, // DMA2 Stream 5 global interrupt
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DMA2_Stream6_IRQn = 69, // DMA2 Stream 6 global interrupt
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DMA2_Stream7_IRQn = 70, // DMA2 Stream 7 global interrupt
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USART6_IRQn = 71, // USART6 global interrupt
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I2C3_EV_IRQn = 72, // I2C3 event interrupt
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I2C3_ER_IRQn = 73, // I2C3 error interrupt
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OTG_HS_EP1_OUT_IRQn = 74, // USB OTG HS End Point 1 Out global interrupt
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OTG_HS_EP1_IN_IRQn = 75, // USB OTG HS End Point 1 In global interrupt
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OTG_HS_WKUP_IRQn = 76, // USB OTG HS Wakeup through EXTI interrupt
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OTG_HS_IRQn = 77, // USB OTG HS global interrupt
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DCMI_IRQn = 78, // DCMI global interrupt
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CRYP_IRQn = 79, // CRYP crypto global interrupt
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HASH_RNG_IRQn = 80, // Hash and Rng global interrupt
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FPU_IRQn = 81 // FPU global interrupt
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* __hwfr_sys_irq_h */
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