kopia lustrzana https://github.com/OpenRTX/OpenRTX
125 wiersze
4.0 KiB
C
125 wiersze
4.0 KiB
C
/***************************************************************************
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* Copyright (C) 2024 - 2025 by Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <gpio_shiftReg.h>
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#include <spi_bitbang.h>
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#include <spi_custom.h>
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#include <adc_stm32.h>
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#include <spi_stm32.h>
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#include <gps_stm32.h>
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#include <SKY72310.h>
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#include <hwconfig.h>
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#include <pthread.h>
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#include <AK2365A.h>
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#include <gps.h>
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static const struct spiConfig spiFlashCfg =
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{
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.clk = { FLASH_CLK },
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.mosi = { FLASH_SDI },
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.miso = { FLASH_SDO },
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.clkPeriod = SCK_PERIOD_FROM_FREQ(1000000),
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.flags = 0
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};
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static const struct spiConfig spiDetCfg =
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{
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.clk = { DET_CLK },
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.mosi = { DET_DAT },
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.miso = { DET_DAT },
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.clkPeriod = SCK_PERIOD_FROM_FREQ(1000000),
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.flags = SPI_HALF_DUPLEX
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};
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static const struct spiConfig spiPllCfg =
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{
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.clk = { PLL_CLK },
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.mosi = { PLL_DAT },
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.miso = { PLL_DAT },
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.clkPeriod = SCK_PERIOD_FROM_FREQ(1000000),
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.flags = SPI_HALF_DUPLEX
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};
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/**
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* SPI bitbang function for SN74HC595 gpio extender.
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*
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* Hand-tuned to be as fast as possible, gives the following clock performance
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* when compiled with -Os and run on STM32F405 at 168MHz:
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*
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* - Freq 8.46MHz
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* - Pos. width 36ns
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* - Neg. with 82ns
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*/
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static uint8_t spiSr_func(const void *priv, uint8_t value)
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{
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(void) priv;
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for(uint8_t cnt = 0; cnt < 8; cnt++)
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{
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GPIOE->BSRR = (1 << 23); // Clear PE7 (CLK)
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if(value & (0x80 >> cnt))
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GPIOE->BSRR = 1 << 9; // Set PE9 (MOSI)
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else
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GPIOE->BSRR = 1 << 25; // Clear PE9 (MOSI)
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// ~70ns delay
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asm volatile(" mov r1, #1 \n"
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"___loop_2: cmp r1, #0 \n"
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" itt ne \n"
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" subne r1, r1, #1 \n"
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" bne ___loop_2 \n":::"r1");
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GPIOE->BSRR = (1 << 7); // Set PE7 (CLK)
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}
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return 0;
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}
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static const struct gpioPin shiftRegStrobe = { GPIOEXT_STR };
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static pthread_mutex_t adc1Mutex;
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static pthread_mutex_t c6000_mutex;
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SPI_CUSTOM_DEVICE_DEFINE(spiSr, spiSr_func, NULL, NULL)
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SPI_BITBANG_DEVICE_DEFINE(flash_spi, spiFlashCfg, NULL)
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SPI_BITBANG_DEVICE_DEFINE(det_spi, spiDetCfg, NULL)
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SPI_BITBANG_DEVICE_DEFINE(pll_spi, spiPllCfg, NULL)
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SPI_STM32_DEVICE_DEFINE(c6000_spi, SPI2, &c6000_mutex)
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GPIO_SHIFTREG_DEVICE_DEFINE(extGpio, (const struct spiDevice *) &spiSr, shiftRegStrobe, 24)
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ADC_STM32_DEVICE_DEFINE(adc1, ADC1, &adc1Mutex, ADC_COUNTS_TO_UV(3300000, 12))
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const struct ak2365a detector =
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{
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.spi = (const struct spiDevice *) &det_spi,
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.cs = { DET_CS },
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.res = { DET_RST }
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};
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const struct sky73210 pll =
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{
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.spi = (const struct spiDevice *) &pll_spi,
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.cs = { PLL_CS },
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.refClk = 16800000
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};
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const struct gpsDevice gps =
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{
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.enable = gpsStm32_enable,
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.disable = gpsStm32_disable,
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.getSentence = gpsStm32_getNmeaSentence
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};
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