kopia lustrzana https://github.com/OpenRTX/OpenRTX
On MD3x0 baseband, fixed PLL going nuts for some frequencies (e.g. 430.0MHz) and causing the radio transmitting on a shifted band.
rodzic
d74bece14e
commit
f0862abac1
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@ -88,6 +88,22 @@ void pll_setFrequency(float freq, uint8_t clkDiv)
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float Ndiv = floor(K) - 32.0;
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float Ndnd = round(262144*(K - Ndiv - 32.0));
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/*
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* With PLL in fractional mode, dividend range is [-131017 +131071]. If our
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* computation gives a wrong result, we decrement the reference clock divider
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* and redo the computations.
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*
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* TODO: better investigate on how to put PLL in unsigned dividend mode.
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*/
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if(((uint32_t) Ndnd) >= 131070)
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{
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clkDiv -= 1;
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K = freq/(REF_CLK/((float) clkDiv));
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Ndiv = floor(K) - 32.0;
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Ndnd = round(262144*(K - Ndiv - 32.0));
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}
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uint32_t dnd = ((uint32_t) Ndnd);
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uint16_t dndMsb = dnd >> 8;
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uint16_t dndLsb = dnd & 0x00FF;
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