kopia lustrzana https://github.com/OpenRTX/OpenRTX
Added to MDx tone generator driver a function to interrupt an audio stream before its natural completion
Silvano Seva
rodzic
7b5e98bbca
commit
db3efb21be
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@ -49,15 +49,15 @@ static const uint8_t sineTable[] =
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static const uint32_t baseSineFreq = 35;
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uint32_t toneTableIndex = 0; /* Current sine table index for CTCSS generator */
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uint32_t toneTableIncr = 0; /* CTCSS sine table index increment per tick */
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uint32_t toneTableIndex = 0; // Current sine table index for CTCSS generator
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uint32_t toneTableIncr = 0; // CTCSS sine table index increment per tick
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uint32_t beepTableIndex = 0; /* Current sine table index for "beep" generator */
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uint32_t beepTableIncr = 0; /* "beep" sine table index increment per tick */
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uint32_t beepTimerCount = 0; /* Downcounter for timed "beep" */
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uint8_t beepVolume = 0; /* "beep" volume level */
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uint32_t beepTableIndex = 0; // Current sine table index for "beep" generator
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uint32_t beepTableIncr = 0; // "beep" sine table index increment per tick
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uint32_t beepTimerCount = 0; // Downcounter for timed "beep"
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uint8_t beepVolume = 0; // "beep" volume level
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bool tonesLocked = false; /* If true tone channel is in use by FSK/playback */
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bool tonesLocked = false; // If true tone channel is in use by FSK/playback
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using namespace miosix;
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Thread *dmaWaiting = 0;
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@ -88,7 +88,7 @@ void __attribute__((used)) TIM8_TRG_COM_TIM14_IRQHandler()
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}
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}
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/* Shutdown timers if both compare channels are inactive */
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// Shutdown timers if both compare channels are inactive
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if((TIM3->CCER & (TIM_CCER_CC2E | TIM_CCER_CC3E)) == 0)
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{
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TIM3->CR1 &= ~TIM_CR1_CEN;
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@ -140,13 +140,13 @@ void toneGen_init()
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TIM3->ARR = 0xFF;
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TIM3->PSC = 2;
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TIM3->CCMR1 = TIM_CCMR1_OC2M_2 /* CH2 in PWM mode 1, preload enabled */
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TIM3->CCMR1 = TIM_CCMR1_OC2M_2 // CH2 in PWM mode 1, preload enabled
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| TIM_CCMR1_OC2M_1
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| TIM_CCMR1_OC2PE;
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TIM3->CCMR2 = TIM_CCMR2_OC3M_2 /* The same for CH3 */
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TIM3->CCMR2 = TIM_CCMR2_OC3M_2 // The same for CH3
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| TIM_CCMR2_OC3M_1
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| TIM_CCMR2_OC3PE;
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TIM3->CR1 |= TIM_CR1_ARPE; /* Enable auto preload on reload */
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TIM3->CR1 |= TIM_CR1_ARPE; // Enable auto preload on reload
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/*
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* TIM14 configuration:
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@ -206,7 +206,7 @@ void toneGen_beepOn(const float beepFreq, const uint8_t volume,
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const uint32_t duration)
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{
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{
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/* Do not generate "beep" if the PWM channel is busy, critical section */
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// Do not generate "beep" if the PWM channel is busy, critical section
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FastInterruptDisableLock dLock;
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if(tonesLocked) return;
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}
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@ -249,7 +249,7 @@ void toneGen_playAudioStream(const uint16_t* buf, const size_t len,
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if((buf == NULL) || (len == 0) || (sampleRate == 0)) return;
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{
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/* Critical section to avoid race conditions on "tonesLocked" */
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// Critical section to avoid race conditions on "tonesLocked"
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FastInterruptDisableLock dLock;
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tonesLocked = true;
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beepTimerCount = 0;
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@ -277,26 +277,26 @@ void toneGen_playAudioStream(const uint16_t* buf, const size_t len,
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DMA1_Stream2->NDTR = len;
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DMA1_Stream2->PAR = ((uint32_t) &(TIM3->CCR3));
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DMA1_Stream2->M0AR = ((uint32_t) buf);
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DMA1_Stream2->CR = DMA_SxCR_CHSEL_0 /* Channel 1 */
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| DMA_SxCR_PL /* Very high priority */
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| DMA_SxCR_MSIZE_0 /* 16 bit source size */
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| DMA_SxCR_PSIZE_0 /* 16 bit destination size */
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| DMA_SxCR_MINC /* Increment source pointer */
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| DMA_SxCR_DIR_0 /* Memory to peripheral */
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| DMA_SxCR_TCIE /* Transfer complete interrupt */
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| DMA_SxCR_TEIE /* Transfer error interrupt */
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| DMA_SxCR_EN; /* Enable transfer */
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DMA1_Stream2->CR = DMA_SxCR_CHSEL_0 // Channel 1
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| DMA_SxCR_PL // Very high priority
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| DMA_SxCR_MSIZE_0 // 16 bit source size
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| DMA_SxCR_PSIZE_0 // 16 bit destination size
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| DMA_SxCR_MINC // Increment source pointer
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| DMA_SxCR_DIR_0 // Memory to peripheral
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| DMA_SxCR_TCIE // Transfer complete interrupt
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| DMA_SxCR_TEIE // Transfer error interrupt
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| DMA_SxCR_EN; // Enable transfer
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NVIC_ClearPendingIRQ(DMA1_Stream2_IRQn);
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NVIC_SetPriority(DMA1_Stream2_IRQn, 10);
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NVIC_EnableIRQ(DMA1_Stream2_IRQn);
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/* Enable compare channel */
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// Enable compare channel
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TIM3->CCR3 = 0;
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TIM3->CCER |= TIM_CCER_CC3E;
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TIM3->CR1 |= TIM_CR1_CEN;
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/* Start timer */
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// Start timer for DMA transfer triggering
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TIM7->CR1 = TIM_CR1_CEN;
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/*
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@ -315,7 +315,7 @@ void toneGen_playAudioStream(const uint16_t* buf, const size_t len,
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} while(dmaWaiting);
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}
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/* End of transfer, turn off TIM7 and DMA */
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// End of transfer, turn off TIM7 and DMA
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TIM7->CR1 = 0;
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TIM3->CCER &= ~TIM_CCER_CC3E;
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@ -323,11 +323,29 @@ void toneGen_playAudioStream(const uint16_t* buf, const size_t len,
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RCC->APB1ENR &= ~RCC_APB1ENR_TIM7EN;
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__DSB();
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/* Finally, unlock tones */
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// Finally, unlock tones
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FastInterruptDisableLock dLock;
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tonesLocked = false;
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}
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void toneGen_stopAudioStream()
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{
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// Critical section to avoid race conditions
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FastInterruptDisableLock dLock;
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// Stop DMA triggering timer and TIM3 compare channel
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TIM7->CR1 = 0;
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TIM3->CCER &= ~TIM_CCER_CC3E;
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// Shut down TIM7 and DMA
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RCC->AHB1ENR &= ~RCC_AHB1ENR_DMA1EN;
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RCC->APB1ENR &= ~RCC_APB1ENR_TIM7EN;
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// Unlock tones and wake up the thread waiting for completion
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tonesLocked = false;
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if(dmaWaiting) dmaWaiting->IRQwakeup();
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}
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bool toneGen_toneStatus()
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{
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/*
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@ -101,7 +101,8 @@ void toneGen_encodeAFSK1200(const uint8_t *buf, const size_t len);
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/**
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* Reproduce an audio stream, sending audio stream to both the speaker and the
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* rtx baseband IC.
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* This function blocks the execution flow until all data has been sent.
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* This function blocks the execution flow until all data has been sent or the
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* reproduction is interrupted by calling the corresponding function.
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*
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* WARNING: the underlying peripheral accepts ONLY 16 bit transfers, while the
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* PWM resolution is 8 bit. Thus, the sample buffer MUST be of uint16_t elements
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@ -115,6 +116,12 @@ void toneGen_encodeAFSK1200(const uint8_t *buf, const size_t len);
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void toneGen_playAudioStream(const uint16_t *buf, const size_t len,
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const uint32_t sampleRate);
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/**
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* Interrupt the ongoing reproduction of an audio stream, also making the
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* toneGen_playAudioStream return to the caller.
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*/
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void toneGen_stopAudioStream();
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/**
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* Get the current status of the "beep"/AFSK/audio generator stage.
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*
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