kopia lustrzana https://github.com/OpenRTX/OpenRTX
Implemented display backlight regulation for MD-UV380
rodzic
6e758fe92b
commit
bdd5ea6c7b
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@ -20,7 +20,7 @@
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#ifndef HWCONFIG_H
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#define HWCONFIG_H
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#include "stm32f4xx.h"
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#include <stm32f4xx.h>
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/* Screen dimensions */
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#define SCREEN_WIDTH 160
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@ -43,4 +43,26 @@
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#define LCD_BKLIGHT GPIOD,8
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/*
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* To enable pwm for display backlight dimming uncomment this directive.
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*
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* WARNING: backlight pwm is disabled by default because it generates a
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* continuous tone in the speaker and headphones.
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*
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* This issue cannot be solved in any way because it derives from how the
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* MD-UV380 mcu pins are used: to have a noiseless backlight pwm, the control
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* pin has to be connected to a mcu pin having between its alternate functions
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* an output compare channel of one of the timers. With this configuration, the
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* pwm signal can completely generated in hardware and its frequency can be well
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* above 22kHz, which is the upper limit for human ears.
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*
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* In the MD-UV380 radio, display backlight is connected to PD8, which is not
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* connected to any of the available output compare channels. Thus, the pwm
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* signal generation is managed inside the TIM11 ISR by toggling the backlight
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* pin and its frequency has to be low (~250Hz) to not put too much overehad on
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* the processor due to timer ISR triggering at an high rate.
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*
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* #define ENABLE_BKLIGHT_DIMMING
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*/
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#endif
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@ -19,8 +19,30 @@
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#include <platform.h>
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#include <gpio.h>
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#include <os.h>
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#include "hwconfig.h"
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#ifdef ENABLE_BKLIGHT_DIMMING
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void TIM1_TRG_COM_TIM11_IRQHandler()
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{
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OSIntEnter();
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if(TIM11->SR & TIM_SR_CC1IF)
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{
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gpio_clearPin(LCD_BKLIGHT); /* Clear pin on compare match */
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}
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if(TIM11->SR & TIM_SR_UIF)
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{
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gpio_setPin(LCD_BKLIGHT); /* Set pin on counter reload */
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}
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TIM11->SR = 0;
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OSIntExit();
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}
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#endif
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void platform_init()
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{
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/* Configure GPIOs */
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@ -29,6 +51,33 @@ void platform_init()
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gpio_setMode(LCD_BKLIGHT, OUTPUT);
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gpio_clearPin(LCD_BKLIGHT);
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#ifdef ENABLE_BKLIGHT_DIMMING
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/*
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* Configure TIM11 for backlight PWM: Fpwm = 256Hz, 8 bit of resolution
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* APB2 freq. is 84MHz, then: PSC = 1281 to have Ftick = 65.52kHz
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* With ARR = 256, Fpwm is 256Hz;
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*/
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RCC->APB2ENR |= RCC_APB2ENR_TIM11EN;
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TIM11->ARR = 255;
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TIM11->PSC = 1282;
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TIM11->CNT = 0;
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TIM11->CR1 |= TIM_CR1_ARPE;
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TIM11->CCMR1 |= TIM_CCMR1_OC1M_2
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| TIM_CCMR1_OC1M_1
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| TIM_CCMR1_OC1PE;
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TIM11->CCER |= TIM_CCER_CC1E;
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TIM11->CCR1 = 0;
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TIM11->EGR = TIM_EGR_UG; /* Update registers */
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TIM11->SR = 0; /* Clear interrupt flags */
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TIM11->DIER = TIM_DIER_CC1IE /* Interrupt on compare match */
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| TIM_DIER_UIE; /* Interrupt on counter reload */
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TIM11->CR1 |= TIM_CR1_CEN; /* Start timer */
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NVIC_ClearPendingIRQ(TIM1_TRG_COM_TIM11_IRQn);
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NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn,15);
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NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
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#endif
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}
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void platform_terminate()
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@ -39,7 +88,9 @@ void platform_terminate()
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gpio_clearPin(GREEN_LED);
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gpio_clearPin(RED_LED);
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM8EN;
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#ifdef ENABLE_BKLIGHT_DIMMING
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM11EN;
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#endif
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}
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float platform_getVbat()
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@ -108,12 +159,25 @@ void platform_beepStop()
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void platform_setBacklightLevel(uint8_t level)
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{
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if(level > 0)
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/*
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* Little workaround for the following nasty behaviour: if CCR1 value is
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* zero, a waveform with 99% duty cycle is generated. This is because we are
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* emulating pwm with interrupts.
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*/
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if(level > 1)
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{
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#ifdef ENABLE_BKLIGHT_DIMMING
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TIM11->CCR1 = level;
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TIM11->CR1 |= TIM_CR1_CEN;
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#else
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gpio_setPin(LCD_BKLIGHT);
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#endif
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}
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else
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{
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#ifdef ENABLE_BKLIGHT_DIMMING
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TIM11->CR1 &= ~TIM_CR1_CEN;
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#endif
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gpio_clearPin(LCD_BKLIGHT);
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}
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}
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