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GDx: updated radio driver

pull/292/head
Silvano Seva 2024-09-29 09:41:21 +02:00
rodzic 8f9502cade
commit 98978b907f
7 zmienionych plików z 14 dodań i 55 usunięć
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3
meson.build
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@ -185,7 +185,8 @@ gdx_src = ['platform/targets/GDx/platform.c',
'platform/drivers/keyboard/keyboard_GDx.c', 'platform/drivers/keyboard/keyboard_GDx.c',
'platform/drivers/audio/audio_GDx.c', 'platform/drivers/audio/audio_GDx.c',
'platform/drivers/SPI/spi_custom.c', 'platform/drivers/SPI/spi_custom.c',
'platform/drivers/SPI/spi_bitbang.c'] 'platform/drivers/SPI/spi_bitbang.c',
'platform/drivers/SPI/spi_mk22.c']
gdx_inc = ['platform/targets/GDx'] gdx_inc = ['platform/targets/GDx']

51
platform/drivers/baseband/HR_C6000_GDx.cpp
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@ -162,54 +162,3 @@ void HR_Cx000< M >::startAnalogTx(const TxAudioSource source, const FmConfig cfg
(void) cfg; (void) cfg;
} }
template< class M > void HR_Cx000< M >::stopAnalogTx() { } template< class M > void HR_Cx000< M >::stopAnalogTx() { }
/*
* SPI interface driver
*/
template< class M >
void HR_Cx000< M >::uSpi_init()
{
gpio_setMode(DMR_CS, OUTPUT);
gpio_setMode(DMR_CLK, OUTPUT | ALTERNATE_FUNC(2));
gpio_setMode(DMR_MOSI, OUTPUT | ALTERNATE_FUNC(2));
gpio_setMode(DMR_MISO, INPUT | ALTERNATE_FUNC(2));
SIM->SCGC6 |= SIM_SCGC6_SPI0_MASK;
SPI0->MCR &= ~SPI_MCR_MDIS_MASK; // Enable the SPI0 module
SPI0->MCR |= SPI_MCR_MSTR_MASK // Master mode
| SPI_MCR_PCSIS_MASK // CS high when inactive
| SPI_MCR_DIS_RXF_MASK // Disable RX FIFO
| SPI_MCR_DIS_TXF_MASK // Disable TX FIFO
| SPI_MCR_HALT_MASK; // Stop transfers
SPI0->CTAR[0] = SPI_CTAR_FMSZ(7) // 8bit frame size
| SPI_CTAR_CPHA_MASK // CPHA = 1
| SPI_CTAR_PBR(2) // CLK prescaler divide by 5
| SPI_CTAR_BR(3) // CLK scaler divide by 8
| SPI_CTAR_PCSSCK(1)
| SPI_CTAR_PASC(1)
| SPI_CTAR_CSSCK(4)
| SPI_CTAR_ASC(4);
}
template< class M >
uint8_t HR_Cx000< M >::uSpi_sendRecv(const uint8_t value)
{
SPI0->MCR &= ~SPI_MCR_HALT_MASK; // Start transfer
SPI0->MCR |= SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK;
while((SPI0->SR & SPI_SR_TFFF_MASK) == 0) ;
SPI0->PUSHR = SPI_PUSHR_EOQ_MASK | value;
SPI0->SR |= SPI_SR_TFFF_MASK;
while((SPI0->SR & SPI_SR_RFDF_MASK) == 0) ;
SPI0->SR |= SPI_SR_RFDF_MASK;
SPI0->MCR |= SPI_MCR_HALT_MASK; // Start transfer
return SPI0->POPR;
}

8
platform/drivers/baseband/radio_GDx.cpp
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@ -23,6 +23,7 @@
#include <peripherals/gpio.h> #include <peripherals/gpio.h>
#include <calibInfo_GDx.h> #include <calibInfo_GDx.h>
#include <hwconfig.h> #include <hwconfig.h>
#include <spi_mk22.h>
#include <algorithm> #include <algorithm>
#include <utils.h> #include <utils.h>
#include "radioUtils.h" #include "radioUtils.h"
@ -38,7 +39,7 @@ static uint16_t apcVoltage = 0; // APC voltage for TX output po
static enum opstatus radioStatus; // Current operating status static enum opstatus radioStatus; // Current operating status
static HR_C6000& C6000 = HR_C6000::instance(); // HR_C5000 driver static HR_C6000 C6000(&c6000_spi, { DMR_CS }); // HR_C6000 driver
static AT1846S& at1846s = AT1846S::instance(); // AT1846S driver static AT1846S& at1846s = AT1846S::instance(); // AT1846S driver
void radio_init(const rtxStatus_t *rtxState) void radio_init(const rtxStatus_t *rtxState)
@ -64,6 +65,11 @@ void radio_init(const rtxStatus_t *rtxState)
gpio_clearPin(RX_AUDIO_MUX); // Audio out to HR_C6000 gpio_clearPin(RX_AUDIO_MUX); // Audio out to HR_C6000
gpio_clearPin(TX_AUDIO_MUX); // Audio in to microphone gpio_clearPin(TX_AUDIO_MUX); // Audio in to microphone
gpio_setMode(DMR_CLK, OUTPUT | ALTERNATE_FUNC(2));
gpio_setMode(DMR_MOSI, OUTPUT | ALTERNATE_FUNC(2));
gpio_setMode(DMR_MISO, INPUT | ALTERNATE_FUNC(2));
spiMk22_init(&c6000_spi, 2, 3, SPI_FLAG_CPHA);
/* /*
* Enable and configure DAC for PA drive control * Enable and configure DAC for PA drive control
*/ */

2
platform/targets/GDx/hwconfig.c
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@ -20,6 +20,7 @@
#include <spi_bitbang.h> #include <spi_bitbang.h>
#include <spi_custom.h> #include <spi_custom.h>
#include <spi_mk22.h>
#include <hwconfig.h> #include <hwconfig.h>
static const struct spiConfig spiFlashCfg = static const struct spiConfig spiFlashCfg =
@ -32,3 +33,4 @@ static const struct spiConfig spiFlashCfg =
}; };
SPI_BITBANG_DEVICE_DEFINE(nvm_spi, spiFlashCfg, NULL) SPI_BITBANG_DEVICE_DEFINE(nvm_spi, spiFlashCfg, NULL)
SPI_MK22_DEVICE_DEFINE(c6000_spi, SPI0, NULL)

1
platform/targets/GDx/hwconfig.h
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@ -34,6 +34,7 @@ extern "C" {
#endif #endif
extern const struct spiCustomDevice nvm_spi; extern const struct spiCustomDevice nvm_spi;
extern const struct spiDevice c6000_spi;
/* Screen dimensions */ /* Screen dimensions */
#define CONFIG_SCREEN_WIDTH 128 #define CONFIG_SCREEN_WIDTH 128

2
platform/targets/GDx/pinmap_DM1801.h
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@ -79,7 +79,7 @@
/* HR_C6000 control interface */ /* HR_C6000 control interface */
#define DMR_RESET GPIOE,2 #define DMR_RESET GPIOE,2
#define DMR_SLEEP GPIOE,3 #define DMR_SLEEP GPIOE,3
#define DMR_CS GPIOD,0 #define DMR_CS &GpioD,0
#define DMR_CLK GPIOD,1 #define DMR_CLK GPIOD,1
#define DMR_MOSI GPIOD,2 #define DMR_MOSI GPIOD,2
#define DMR_MISO GPIOD,3 #define DMR_MISO GPIOD,3

2
platform/targets/GDx/pinmap_GD77.h
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@ -79,7 +79,7 @@
/* HR_C6000 control interface */ /* HR_C6000 control interface */
#define DMR_RESET GPIOE,0 #define DMR_RESET GPIOE,0
#define DMR_SLEEP GPIOE,1 #define DMR_SLEEP GPIOE,1
#define DMR_CS GPIOD,0 #define DMR_CS &GpioD,0
#define DMR_CLK GPIOD,1 #define DMR_CLK GPIOD,1
#define DMR_MOSI GPIOD,2 #define DMR_MOSI GPIOD,2
#define DMR_MISO GPIOD,3 #define DMR_MISO GPIOD,3