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Added compilation of R5F6166x GPIO driver, fixed compilation errors in the same unit

ft70d
Silvano Seva 2022-10-21 19:54:28 +02:00
rodzic 0cfd6c92a9
commit 76073cbfc6
2 zmienionych plików z 11 dodań i 10 usunięć
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3
meson.build
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@ -259,7 +259,8 @@ mk22fn512_def = mk22fn512_def + miosix_cm4f_def
## R5F61668
##
r5f61668_src = ['platform/mcu/R5F6166x/boot/startup.c']
r5f61668_src = ['platform/mcu/R5F6166x/boot/startup.c',
'platform/mcu/R5F6166x/drivers/gpio.c']
r5f61668_inc = ['platform/mcu/R5F6166x/device']
r5f61668_def = {}

18
platform/mcu/R5F6166x/drivers/gpio.c
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@ -27,7 +27,7 @@ enum REGS
PnICR = 0x010, // Input buffer control register
PnPCR = 0x028, // Pull-up MOS control register
PnODR = 0x03B // Open-drain control register
}
};
#define REG(x,y) (((uint8_t *) x) + y)
@ -36,16 +36,16 @@ void gpio_setMode(void *port, uint8_t pin, enum Mode mode)
uint32_t p = (uint32_t) port;
// GPIO port 5 is input-only
if(p == (uint32_t)(P5)) return;
if(p == (uint32_t)(&P5)) return;
// Reset open-drain setting, only for P2 and PF
if((p == ((uint32_t) P2)) || (p == ((uint32_t) PF)))
if((p == ((uint32_t) &P2)) || (p == ((uint32_t) &PF)))
{
*REG(port, PnODR) &= ~(1 << pin);
}
// Reset pull-up setting, only for PD ... PK
if((p >= ((uint32_t) PD)) && (p <= ((uint32_t) PK)))
if((p >= ((uint32_t) &PD)) && (p <= ((uint32_t) &PK)))
{
*REG(port, PnPCR) &= ~(1 << pin);
}
@ -58,7 +58,7 @@ void gpio_setMode(void *port, uint8_t pin, enum Mode mode)
case INPUT_PULL_UP:
// Only PD ... PK have pull-up control register.
if((p < ((uint32_t) PD)) || (p > ((uint32_t) PK))) return;
if((p < ((uint32_t) &PD)) || (p > ((uint32_t) &PK))) return;
*REG(port, PnDDR) &= ~(1 << pin); // Input mode
*REG(port, PnPCR) |= (1 << pin); // Enable pull-up
@ -70,7 +70,7 @@ void gpio_setMode(void *port, uint8_t pin, enum Mode mode)
case OPEN_DRAIN:
// Only P2 and PF have open drain capability.
if((p != ((uint32_t) P2)) && (p != ((uint32_t) PF))) return;
if((p != ((uint32_t) &P2)) && (p != ((uint32_t) &PF))) return;
*REG(port, PnDDR) |= (1 << pin); // Output mode
*REG(port, PnODR) |= (1 << pin); // Enable open-drain
@ -105,7 +105,7 @@ void gpio_setOutputSpeed(void *port, uint8_t pin, enum Speed spd)
void gpio_setPin(void *port, uint8_t pin)
{
// GPIO port 5 is input-only
if((uint32_t)(port) == (uint32_t)(P5)) return;
if((uint32_t)(port) == (uint32_t)(&P5)) return;
*REG(port, PnDR) |= (1 << pin);
}
@ -113,7 +113,7 @@ void gpio_setPin(void *port, uint8_t pin)
void gpio_clearPin(void *port, uint8_t pin)
{
// GPIO port 5 is input-only
if((uint32_t)(port) == (uint32_t)(P5)) return;
if((uint32_t)(port) == (uint32_t)(&P5)) return;
*REG(port, PnDR) &= ~(1 << pin);
}
@ -121,7 +121,7 @@ void gpio_clearPin(void *port, uint8_t pin)
void gpio_togglePin(void *port, uint8_t pin)
{
// GPIO port 5 is input-only
if((uint32_t)(port) == (uint32_t)(P5)) return;
if((uint32_t)(port) == (uint32_t)(&P5)) return;
*REG(port, PnDR) ^= (1 << pin);
}