Implemented backlight dimming for GD77 and DM-1801 targets

replace/20a53f819a19e640b1015b3cd28ef203edcc54b9
Silvano Seva 2020-12-21 12:55:34 +01:00
rodzic 7b442047ec
commit 4f34822db2
2 zmienionych plików z 34 dodań i 18 usunięć

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@ -32,6 +32,22 @@ void platform_init()
gpio_clearPin(LCD_BKLIGHT);
gpio_setMode(PTT_SW, INPUT);
/*
* Configure backlight PWM: 58.5kHz, 8 bit resolution
*/
SIM->SCGC6 |= SIM_SCGC6_FTM0(1); /* Enable clock */
FTM0->CONTROLS[3].CnSC = FTM_CnSC_MSB(1)
| FTM_CnSC_ELSB(1); /* Edge-aligned PWM, clear on match */
FTM0->CONTROLS[3].CnV = 0;
FTM0->MOD = 0xFF; /* Reload value */
FTM0->SC = FTM_SC_PS(3) /* Prescaler divide by 8 */
| FTM_SC_CLKS(1); /* Enable timer */
gpio_setMode(LCD_BKLIGHT, OUTPUT);
gpio_setAlternateFunction(LCD_BKLIGHT, 2);
}
void platform_terminate()
@ -119,13 +135,5 @@ void platform_beepStop()
void platform_setBacklightLevel(uint8_t level)
{
/* TODO: backlight dimming */
if(level > 1)
{
gpio_setPin(LCD_BKLIGHT);
}
else
{
gpio_clearPin(LCD_BKLIGHT);
}
FTM0->CONTROLS[3].CnV = level;
}

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@ -32,6 +32,22 @@ void platform_init()
gpio_clearPin(LCD_BKLIGHT);
gpio_setMode(PTT_SW, INPUT);
/*
* Configure backlight PWM: 58.5kHz, 8 bit resolution
*/
SIM->SCGC6 |= SIM_SCGC6_FTM0(1); /* Enable clock */
FTM0->CONTROLS[3].CnSC = FTM_CnSC_MSB(1)
| FTM_CnSC_ELSB(1); /* Edge-aligned PWM, clear on match */
FTM0->CONTROLS[3].CnV = 0;
FTM0->MOD = 0xFF; /* Reload value */
FTM0->SC = FTM_SC_PS(3) /* Prescaler divide by 8 */
| FTM_SC_CLKS(1); /* Enable timer */
gpio_setMode(LCD_BKLIGHT, OUTPUT);
gpio_setAlternateFunction(LCD_BKLIGHT, 2);
}
void platform_terminate()
@ -119,13 +135,5 @@ void platform_beepStop()
void platform_setBacklightLevel(uint8_t level)
{
/* TODO: backlight dimming */
if(level > 1)
{
gpio_setPin(LCD_BKLIGHT);
}
else
{
gpio_clearPin(LCD_BKLIGHT);
}
FTM0->CONTROLS[3].CnV = level;
}