Changed gain and added an offset at tx RRC stage only for Module 17 to compensate for an hardware bug

pull/68/head
Silvano Seva 2022-03-30 19:16:08 +02:00
rodzic 4a3e31cd03
commit 4b8685b853
4 zmienionych plików z 12 dodań i 5 usunięć

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@ -111,7 +111,13 @@ private:
static constexpr size_t M17_TX_SAMPLE_RATE = 48000;
static constexpr size_t M17_FRAME_SAMPLES_48K = 1920;
static constexpr size_t M17_FRAME_SYMBOLS = 192;
#ifdef PLATFORM_MOD17
static constexpr float M17_RRC_GAIN = 15000.0f;
static constexpr float M17_RRC_OFFSET = 11500.0f;
#else
static constexpr float M17_RRC_GAIN = 7168.0f;
static constexpr float M17_RRC_OFFSET = 0.0f;
#endif
std::array< int16_t, M17_FRAME_SYMBOLS > symbols;
stream_sample_t *baseband_buffer; ///< Buffer for baseband audio handling.

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@ -97,7 +97,8 @@ void M17Modulator::generateBaseband()
for(size_t i = 0; i < M17_FRAME_SAMPLES_48K; i++)
{
float elem = static_cast< float >(idleBuffer[i]);
idleBuffer[i] = static_cast< int16_t >(M17::rrc(elem) * M17_RRC_GAIN);
idleBuffer[i] = static_cast< int16_t >((M17::rrc(elem) * M17_RRC_GAIN)
- M17_RRC_OFFSET);
}
}

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@ -51,7 +51,7 @@ void stopTransfer()
TIM7->CR1 = 0; // Shutdown timer
DAC->SR = 0; // Clear status flags
DAC->CR = DAC_CR_EN1; // Keep only channel 1 active
DAC->DHR12R1 = 2048; // Set channel 1 (RTX) to VDD/2 when idle
DAC->DHR12R1 = 1365; // Set channel 1 (RTX) to about 1.1V when idle
// Clear flags
running = false;

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@ -42,19 +42,19 @@ void platform_init()
gpio_setMode(PTT_OUT, OUTPUT);
gpio_clearPin(PTT_OUT);
/* Set analog output for baseband signal to an idle level of VDD/2 */
/* Set analog output for baseband signal to an idle level of 1.1V */
gpio_setMode(BASEBAND_TX, INPUT_ANALOG);
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
DAC->CR |= DAC_CR_EN1;
DAC->DHR12R1 = 2048;
DAC->DHR12R1 = 1365;
nvm_init();
adc1_init();
i2c_init();
mcp4551_init(SOFTPOT_RX);
mcp4551_init(SOFTPOT_TX);
mcp4551_setWiper(SOFTPOT_TX, 0x100);
//mcp4551_setWiper(SOFTPOT_RX, MCP4551_WIPER_A);
//mcp4551_setWiper(SOFTPOT_TX, MCP4551_WIPER_A);
audio_init();
}