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Fixed compilation warnings and code refactoring pass

replace/42d90e61d4ae5dd7fb7f6dcdedfc7403a5d18ba5
Silvano Seva 2021-02-03 14:50:00 +01:00
rodzic 1846fde270
commit 1cd0efdee1
6 zmienionych plików z 547 dodań i 510 usunięć
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87
openrtx/src/graphics.c
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@ -163,21 +163,24 @@ inline void gfx_setPixel(point_t pos, color_t color)
#ifdef PIX_FMT_RGB565
// Blend old pixel value and new one
if (color.alpha < 255) {
if (color.alpha < 255)
{
uint8_t alpha = color.alpha;
rgb565_t new_pixel = _true2highColor(color);
uint16_t raw_pixel = *((uint16_t *)buf + pos.x + pos.y*SCREEN_WIDTH);
rgb565_t old_pixel = *((rgb565_t*) &raw_pixel);
rgb565_t old_pixel = buf[pos.x + pos.y*SCREEN_WIDTH];
rgb565_t pixel = {((255-alpha)*old_pixel.b+alpha*new_pixel.b)/255,
((255-alpha)*old_pixel.g+alpha*new_pixel.g)/255,
((255-alpha)*old_pixel.r+alpha*new_pixel.r)/255};
buf[pos.x + pos.y*SCREEN_WIDTH] = pixel;
} else {
}
else
{
buf[pos.x + pos.y*SCREEN_WIDTH] = _true2highColor(color);
}
#elif defined PIX_FMT_BW
// Ignore more than half transparent pixels
if (color.alpha >= 128) {
if (color.alpha >= 128)
{
uint16_t cell = (pos.x + pos.y*SCREEN_WIDTH) / 8;
uint16_t elem = (pos.x + pos.y*SCREEN_WIDTH) % 8;
buf[cell] &= ~(1 << elem);
@ -243,19 +246,18 @@ void gfx_drawVLine(uint16_t x, uint16_t width, color_t color)
* @param text: the input text
* @param length: the length of the input text, used for boundary checking
*/
static inline uint16_t get_line_size(GFXfont f,
const char *text,
uint16_t length) {
static inline uint16_t get_line_size(GFXfont f, const char *text, uint16_t length)
{
uint16_t line_size = 0;
for(unsigned i = 0;
i < length && text[i] != '\n' && text[i] != '\r';
i++) {
for(unsigned i = 0; i < length && text[i] != '\n' && text[i] != '\r'; i++)
{
GFXglyph glyph = f.glyph[text[i] - f.first];
if (line_size + glyph.xAdvance < SCREEN_WIDTH)
line_size += glyph.xAdvance;
else
break;
}
return line_size;
}
@ -264,9 +266,9 @@ static inline uint16_t get_line_size(GFXfont f,
* @param alinment: enum representing the text alignment
* @param line_size: the size of the current text line in pixels
*/
static inline uint16_t get_reset_x(textAlign_t alignment,
uint16_t line_size,
uint16_t startx) {
static inline uint16_t get_reset_x(textAlign_t alignment, uint16_t line_size,
uint16_t startx)
{
switch(alignment)
{
case TEXT_ALIGN_LEFT:
@ -276,10 +278,13 @@ static inline uint16_t get_reset_x(textAlign_t alignment,
case TEXT_ALIGN_RIGHT:
return SCREEN_WIDTH - line_size - startx;
}
return 0;
}
point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t alignment, color_t color) {
point_t gfx_print(point_t start, const char *text, fontSize_t size,
textAlign_t alignment, color_t color)
{
GFXfont f = fonts[size];
@ -289,13 +294,14 @@ point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t
uint16_t line_size = get_line_size(f, text, len);
uint16_t reset_x = get_reset_x(alignment, line_size, start.x);
start.x = reset_x;
// Save initial start.y value to calculate vertical size
uint16_t saved_start_y = start.y;
uint16_t line_h = 0;
/* For each char in the string */
for(unsigned i = 0; i < len; i++) {
for(unsigned i = 0; i < len; i++)
{
char c = text[i];
GFXglyph glyph = f.glyph[c - f.first];
uint8_t *bitmap = f.bitmap;
@ -308,17 +314,21 @@ point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t
line_h = h;
// Handle newline and carriage return
if (c == '\n') {
if (c == '\n')
{
start.x = reset_x;
start.y += f.yAdvance;
continue;
} else if (c == '\r') {
}
else if (c == '\r')
{
start.x = reset_x;
continue;
}
// Handle wrap around
if (start.x + glyph.xAdvance > SCREEN_WIDTH) {
if (start.x + glyph.xAdvance > SCREEN_WIDTH)
{
// Compute size of the first row in pixels
line_size = get_line_size(f, text, len);
start.x = reset_x = get_reset_x(alignment, line_size, start.x);
@ -326,12 +336,17 @@ point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t
}
// Draw bitmap
for (yy = 0; yy < h; yy++) {
for (xx = 0; xx < w; xx++) {
if (!(bit++ & 7)) {
for (yy = 0; yy < h; yy++)
{
for (xx = 0; xx < w; xx++)
{
if (!(bit++ & 7))
{
bits = bitmap[bo++];
}
if (bits & 0x80) {
if (bits & 0x80)
{
if (start.y + yo + yy < SCREEN_HEIGHT &&
start.x + xo + xx < SCREEN_WIDTH &&
start.y + yo + yy > 0 &&
@ -342,9 +357,11 @@ point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t
}
}
bits <<= 1;
}
}
start.x += glyph.xAdvance;
}
// Calculate text size
@ -355,7 +372,8 @@ point_t gfx_print(point_t start, const char *text, fontSize_t size, textAlign_t
}
// Print an error message to the center of the screen, surronded by a red (when possible) box
void gfx_printError(const char *text, fontSize_t size) {
void gfx_printError(const char *text, fontSize_t size)
{
// 3 px box padding
uint16_t box_padding = 16;
color_t white = {255, 255, 255, 255};
@ -382,8 +400,8 @@ void gfx_printError(const char *text, fontSize_t size) {
* * ******* * |
* * ******* ** |
* * ******* ** | <-- Height (px)
* * ******* * |
* * * |
* * ******* * |
* * * |
* **************** |
*
* __________________
@ -394,7 +412,9 @@ void gfx_printError(const char *text, fontSize_t size) {
* Width (px)
*
*/
void gfx_drawBattery(point_t start, uint16_t width, uint16_t height, float percentage) {
void gfx_drawBattery(point_t start, uint16_t width, uint16_t height,
float percentage)
{
color_t white = {255, 255, 255, 255};
color_t black = {0, 0, 0 , 255};
@ -421,7 +441,8 @@ void gfx_drawBattery(point_t start, uint16_t width, uint16_t height, float perce
// Draw the battery fill
point_t fill_start = {start.x + 2, start.y + 2};
gfx_drawRect(fill_start, (int)(((float)(width - 4)) * percentage), height - 4, bat_color, true);
gfx_drawRect(fill_start, (int)(((float)(width - 4)) * percentage),
height - 4, bat_color, true);
// Round corners
point_t top_left = start;
@ -459,13 +480,16 @@ void gfx_drawBattery(point_t start, uint16_t width, uint16_t height, float perce
* Width (px)
*
*/
void gfx_drawSmeter(point_t start, uint16_t width, uint16_t height, float rssi, float squelch, color_t color) {
void gfx_drawSmeter(point_t start, uint16_t width, uint16_t height, float rssi,
float squelch, color_t color)
{
color_t white = {255, 255, 255, 255};
color_t yellow = {250, 180, 19 , 255};
color_t red = {255, 0, 0 , 255};
// S-level dots
for(int i = 0; i < 11; i++) {
for(int i = 0; i < 11; i++)
{
color_t color = (i % 3 == 0) ? yellow : white;
color = (i > 9) ? red : color;
point_t pixel_pos = {i * (width - 1) / 11, start.y};
@ -473,6 +497,7 @@ void gfx_drawSmeter(point_t start, uint16_t width, uint16_t height, float rssi,
pixel_pos.y += height;
gfx_setPixel(pixel_pos, color);
}
point_t pixel_pos = {width - 1, start.y};
gfx_setPixel(pixel_pos, red);
pixel_pos.y += height;

4
openrtx/src/ui/ui_main.c
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@ -67,7 +67,7 @@ void _ui_drawMainTop()
void _ui_drawZoneChannel()
{
char zone_buf[20] = "";
char channel_buf[20] = "";
char channel_buf[25] = "";
if(!last_state.zone_enabled)
snprintf(zone_buf, sizeof(zone_buf), "zone: %.13s", "All channels");
else
@ -83,7 +83,7 @@ void _ui_drawZoneChannel()
void _ui_drawFrequency()
{
// Print big numbers frequency
char freq_buf[10] = "";
char freq_buf[15] = "";
snprintf(freq_buf, sizeof(freq_buf), "%03lu.%05lu",
(unsigned long)last_state.channel.rx_frequency/1000000,
(unsigned long)last_state.channel.rx_frequency%1000000/10);

6
platform/drivers/NVM/nvmem_GDx.c
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@ -241,15 +241,21 @@ void nvm_loadHwInfo(hwInfo_t *info)
int nvm_readChannelData(channel_t *channel, uint16_t pos)
{
(void) channel;
(void) pos;
return -1;
}
int nvm_readZoneData(zone_t *zone, uint16_t pos)
{
(void) zone;
(void) pos;
return -1;
}
int nvm_readContactData(contact_t *contact, uint16_t pos)
{
(void) contact;
(void) pos;
return -1;
}

688
platform/mcu/STM32F4xx/drivers/usb/usb_core.c
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Plik diff jest za duży Load Diff

264
platform/mcu/STM32F4xx/drivers/usb/usb_dcd_int.c
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@ -16,8 +16,8 @@
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
@ -31,7 +31,7 @@
* @{
*/
/** @defgroup USB_DCD_INT
/** @defgroup USB_DCD_INT
* @brief This file contains the interrupt subroutines for the Device mode.
* @{
*/
@ -39,40 +39,40 @@
/** @defgroup USB_DCD_INT_Private_Defines
* @{
*/
*/
/**
* @}
*/
*/
/** @defgroup USB_DCD_INT_Private_TypesDefinitions
* @{
*/
*/
/**
* @}
*/
*/
/** @defgroup USB_DCD_INT_Private_Macros
* @{
*/
*/
/**
* @}
*/
*/
/** @defgroup USB_DCD_INT_Private_Variables
* @{
*/
*/
/**
* @}
*/
*/
/** @defgroup USB_DCD_INT_Private_FunctionPrototypes
* @{
*/
*/
/* static functions */
static uint32_t DCD_ReadDevInEP (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum);
@ -98,15 +98,15 @@ static uint32_t DCD_OTG_ISR(USB_OTG_CORE_HANDLE *pdev);
/**
* @}
*/
*/
/** @defgroup USB_DCD_INT_Private_Functions
* @{
*/
*/
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
/**
* @brief USBD_OTG_EP1OUT_ISR_Handler
* handles all USB Interrupts
@ -115,13 +115,13 @@ static uint32_t DCD_OTG_ISR(USB_OTG_CORE_HANDLE *pdev);
*/
uint32_t USBD_OTG_EP1OUT_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_DOEPINTn_TypeDef doepint;
USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
doepint.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[1]->DOEPINT);
doepint.d32&= USB_OTG_READ_REG32(&pdev->regs.DREGS->DOUTEP1MSK);
/* Transfer complete */
if ( doepint.b.xfercompl )
{
@ -133,13 +133,13 @@ uint32_t USBD_OTG_EP1OUT_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
/*ToDo : handle more than one single MPS size packet */
pdev->dev.out_ep[1].xfer_count = pdev->dev.out_ep[1].maxpacket - \
deptsiz.b.xfersize;
}
}
/* Inform upper layer: data ready */
/* RX COMPLETE */
USBD_DCD_INT_fops->DataOutStage(pdev , 1);
}
/* Endpoint disable */
if ( doepint.b.epdisabled )
{
@ -158,15 +158,15 @@ uint32_t USBD_OTG_EP1OUT_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
*/
uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_DIEPINTn_TypeDef diepint;
uint32_t fifoemptymsk, msk, emp;
msk = USB_OTG_READ_REG32(&pdev->regs.DREGS->DINEP1MSK);
emp = USB_OTG_READ_REG32(&pdev->regs.DREGS->DIEPEMPMSK);
msk |= ((emp >> 1 ) & 0x1) << 7;
diepint.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[1]->DIEPINT) & msk;
diepint.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[1]->DIEPINT) & msk;
if ( diepint.b.xfercompl )
{
fifoemptymsk = 0x1 << 1;
@ -178,7 +178,7 @@ uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
if ( diepint.b.epdisabled )
{
CLEAR_IN_EP_INTR(1, epdisabled);
}
}
if ( diepint.b.timeout )
{
CLEAR_IN_EP_INTR(1, timeout);
@ -210,7 +210,7 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef gintr_status;
uint32_t retval = 0;
if (USB_OTG_IsDeviceMode(pdev)) /* ensure that we are in device mode */
{
gintr_status.d32 = USB_OTG_ReadCoreItr(pdev);
@ -218,32 +218,32 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
{
return 0;
}
if (gintr_status.b.outepintr)
{
retval |= DCD_HandleOutEP_ISR(pdev);
}
}
if (gintr_status.b.inepint)
{
retval |= DCD_HandleInEP_ISR(pdev);
}
if (gintr_status.b.modemismatch)
{
USB_OTG_GINTSTS_TypeDef gintsts;
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.modemismatch = 1;
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
}
if (gintr_status.b.wkupintr)
{
retval |= DCD_HandleResume_ISR(pdev);
}
if (gintr_status.b.usbsuspend)
{
retval |= DCD_HandleUSBSuspend_ISR(pdev);
@ -251,25 +251,25 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
if (gintr_status.b.sofintr)
{
retval |= DCD_HandleSof_ISR(pdev);
}
if (gintr_status.b.rxstsqlvl)
{
retval |= DCD_HandleRxStatusQueueLevel_ISR(pdev);
}
if (gintr_status.b.usbreset)
{
retval |= DCD_HandleUsbReset_ISR(pdev);
}
if (gintr_status.b.enumdone)
{
retval |= DCD_HandleEnumDone_ISR(pdev);
}
if (gintr_status.b.incomplisoin)
{
retval |= DCD_IsoINIncomplete_ISR(pdev);
@ -278,7 +278,7 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
if (gintr_status.b.incomplisoout)
{
retval |= DCD_IsoOUTIncomplete_ISR(pdev);
}
}
#ifdef VBUS_SENSING_ENABLED
if (gintr_status.b.sessreqintr)
{
@ -288,8 +288,8 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
if (gintr_status.b.otgintr)
{
retval |= DCD_OTG_ISR(pdev);
}
#endif
}
#endif
}
return retval;
}
@ -303,13 +303,13 @@ uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
*/
static uint32_t DCD_SessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef gintsts;
USB_OTG_GINTSTS_TypeDef gintsts;
USBD_DCD_INT_fops->DevConnected (pdev);
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.sessreqintr = 1;
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
return 1;
}
@ -326,13 +326,13 @@ static uint32_t DCD_OTG_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_GOTGINT_TypeDef gotgint;
gotgint.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGINT);
if (gotgint.b.sesenddet)
{
USBD_DCD_INT_fops->DevDisconnected (pdev);
}
/* Clear OTG interrupt */
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
return 1;
}
#endif
@ -348,24 +348,26 @@ static uint32_t DCD_HandleResume_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_GINTSTS_TypeDef gintsts;
USB_OTG_DCTL_TypeDef devctl;
USB_OTG_PCGCCTL_TypeDef power;
if(pdev->cfg.low_power)
{
/* un-gate USB Core clock */
#pragma GCC diagnostic ignored "-Wstrict-aliasing"
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
power.b.gatehclk = 0;
power.b.stoppclk = 0;
USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);
#pragma GCC diagnostic pop
}
/* Clear the Remote Wake-up Signaling */
devctl.d32 = 0;
devctl.b.rmtwkupsig = 1;
USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, devctl.d32, 0);
/* Inform upper layer by the Resume Event */
USBD_DCD_INT_fops->Resume (pdev);
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.wkupintr = 1;
@ -385,29 +387,29 @@ static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_PCGCCTL_TypeDef power;
USB_OTG_DSTS_TypeDef dsts;
__IO uint8_t prev_status = 0;
prev_status = pdev->dev.device_status;
USBD_DCD_INT_fops->Suspend (pdev);
USBD_DCD_INT_fops->Suspend (pdev);
dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.usbsuspend = 1;
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
if((pdev->cfg.low_power) && (dsts.b.suspsts == 1) &&
(pdev->dev.connection_status == 1) &&
if((pdev->cfg.low_power) && (dsts.b.suspsts == 1) &&
(pdev->dev.connection_status == 1) &&
(prev_status == USB_OTG_CONFIGURED))
{
/* switch-off the clocks */
power.d32 = 0;
power.b.stoppclk = 1;
USB_OTG_MODIFY_REG32(pdev->regs.PCGCCTL, 0, power.d32);
USB_OTG_MODIFY_REG32(pdev->regs.PCGCCTL, 0, power.d32);
power.b.gatehclk = 1;
USB_OTG_MODIFY_REG32(pdev->regs.PCGCCTL, 0, power.d32);
/* Request to enter Sleep mode after exit from current ISR */
SCB->SCR |= (SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk);
}
@ -423,13 +425,13 @@ static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev)
static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_DIEPINTn_TypeDef diepint;
uint32_t ep_intr;
uint32_t epnum = 0;
uint32_t fifoemptymsk;
diepint.d32 = 0;
ep_intr = USB_OTG_ReadDevAllInEPItr(pdev);
while ( ep_intr )
{
if (ep_intr&0x1) /* In ITR */
@ -442,7 +444,7 @@ static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
CLEAR_IN_EP_INTR(epnum, xfercompl);
/* TX COMPLETE */
USBD_DCD_INT_fops->DataInStage(pdev , epnum);
if (pdev->cfg.dma_enable == 1)
{
if((epnum == 0) && (pdev->dev.device_state == USB_OTG_EP0_STATUS_IN))
@ -450,7 +452,7 @@ static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
/* prepare to rx more setup packets */
USB_OTG_EP0_OutStart(pdev);
}
}
}
}
if ( diepint.b.timeout )
{
@ -467,19 +469,19 @@ static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
if ( diepint.b.epdisabled )
{
CLEAR_IN_EP_INTR(epnum, epdisabled);
}
}
if (diepint.b.emptyintr)
{
DCD_WriteEmptyTxFifo(pdev , epnum);
CLEAR_IN_EP_INTR(epnum, emptyintr);
}
}
epnum++;
ep_intr >>= 1;
}
return 1;
}
@ -495,19 +497,19 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_DOEPINTn_TypeDef doepint;
USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
uint32_t epnum = 0;
doepint.d32 = 0;
/* Read in the device interrupt bits */
ep_intr = USB_OTG_ReadDevAllOutEp_itr(pdev);
while ( ep_intr )
{
if (ep_intr&0x1)
{
doepint.d32 = USB_OTG_ReadDevOutEP_itr(pdev, epnum);
/* Transfer complete */
if ( doepint.b.xfercompl )
{
@ -523,7 +525,7 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
/* Inform upper layer: data ready */
/* RX COMPLETE */
USBD_DCD_INT_fops->DataOutStage(pdev , epnum);
if (pdev->cfg.dma_enable == 1)
{
if((epnum == 0) && (pdev->dev.device_state == USB_OTG_EP0_STATUS_OUT))
@ -531,7 +533,7 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
/* prepare to rx more setup packets */
USB_OTG_EP0_OutStart(pdev);
}
}
}
}
/* Endpoint disable */
if ( doepint.b.epdisabled )
@ -542,7 +544,7 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
/* Setup Phase Done (control EPs) */
if ( doepint.b.setup )
{
/* inform the upper layer that a setup packet is available */
/* SETUP COMPLETE */
USBD_DCD_INT_fops->SetupStage(pdev);
@ -564,15 +566,15 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
static uint32_t DCD_HandleSof_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef GINTSTS;
USBD_DCD_INT_fops->SOF(pdev);
/* Clear interrupt */
GINTSTS.d32 = 0;
GINTSTS.b.sofintr = 1;
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, GINTSTS.d32);
return 1;
}
@ -587,17 +589,17 @@ static uint32_t DCD_HandleRxStatusQueueLevel_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_GINTMSK_TypeDef int_mask;
USB_OTG_DRXSTS_TypeDef status;
USB_OTG_EP *ep;
/* Disable the Rx Status Queue Level interrupt */
int_mask.d32 = 0;
int_mask.b.rxstsqlvl = 1;
USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, int_mask.d32, 0);
/* Get the Status from the top of the FIFO */
status.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GRXSTSP );
ep = &pdev->dev.out_ep[status.b.epnum];
switch (status.b.pktsts)
{
case STS_GOUT_NAK:
@ -622,10 +624,10 @@ static uint32_t DCD_HandleRxStatusQueueLevel_ISR(USB_OTG_CORE_HANDLE *pdev)
default:
break;
}
/* Enable the Rx Status Queue Level interrupt */
USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, 0, int_mask.d32);
return 1;
}
@ -642,42 +644,42 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
uint32_t len = 0;
uint32_t len32b;
txstatus.d32 = 0;
ep = &pdev->dev.in_ep[epnum];
ep = &pdev->dev.in_ep[epnum];
len = ep->xfer_len - ep->xfer_count;
if (len > ep->maxpacket)
{
len = ep->maxpacket;
}
len32b = (len + 3) / 4;
txstatus.d32 = USB_OTG_READ_REG32( &pdev->regs.INEP_REGS[epnum]->DTXFSTS);
while (txstatus.b.txfspcavail > len32b &&
ep->xfer_count < ep->xfer_len &&
ep->xfer_len != 0)
{
/* Write the FIFO */
len = ep->xfer_len - ep->xfer_count;
if (len > ep->maxpacket)
{
len = ep->maxpacket;
}
len32b = (len + 3) / 4;
USB_OTG_WritePacket (pdev , ep->xfer_buff, epnum, len);
ep->xfer_buff += len;
ep->xfer_count += len;
txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
}
return 1;
}
@ -696,37 +698,37 @@ static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_DCTL_TypeDef dctl;
USB_OTG_GINTSTS_TypeDef gintsts;
uint32_t i;
dctl.d32 = 0;
daintmsk.d32 = 0;
doepmsk.d32 = 0;
diepmsk.d32 = 0;
dcfg.d32 = 0;
gintsts.d32 = 0;
/* Clear the Remote Wake-up Signaling */
dctl.b.rmtwkupsig = 1;
USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, dctl.d32, 0 );
/* Flush the Tx FIFO */
USB_OTG_FlushTxFifo(pdev , 0 );
for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
{
USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPINT, 0xFF);
USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPINT, 0xFF);
}
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINT, 0xFFFFFFFF );
daintmsk.ep.in = 1;
daintmsk.ep.out = 1;
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINTMSK, daintmsk.d32 );
doepmsk.b.setup = 1;
doepmsk.b.xfercompl = 1;
doepmsk.b.epdisabled = 1;
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOEPMSK, doepmsk.d32 );
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOUTEP1MSK, doepmsk.d32 );
#endif
diepmsk.b.xfercompl = 1;
@ -734,23 +736,23 @@ static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev)
diepmsk.b.epdisabled = 1;
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DIEPMSK, diepmsk.d32 );
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DINEP1MSK, diepmsk.d32 );
#endif
/* Reset Device Address */
dcfg.d32 = USB_OTG_READ_REG32( &pdev->regs.DREGS->DCFG);
dcfg.b.devaddr = 0;
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DCFG, dcfg.d32);
/* setup EP0 to receive SETUP packets */
USB_OTG_EP0_OutStart(pdev);
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.usbreset = 1;
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
/*Reset internal state machine */
USBD_DCD_INT_fops->Reset(pdev);
return 1;
@ -766,28 +768,28 @@ static uint32_t DCD_HandleEnumDone_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef gintsts;
USB_OTG_GUSBCFG_TypeDef gusbcfg;
USB_OTG_EP0Activate(pdev);
/* Set USB turn-around time based on device speed and PHY interface. */
gusbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
/* Full or High speed */
if ( USB_OTG_GetDeviceSpeed(pdev) == USB_SPEED_HIGH)
{
pdev->cfg.speed = USB_OTG_SPEED_HIGH;
pdev->cfg.mps = USB_OTG_HS_MAX_PACKET_SIZE ;
pdev->cfg.mps = USB_OTG_HS_MAX_PACKET_SIZE ;
gusbcfg.b.usbtrdtim = 9;
}
else
{
pdev->cfg.speed = USB_OTG_SPEED_FULL;
pdev->cfg.mps = USB_OTG_FS_MAX_PACKET_SIZE ;
pdev->cfg.mps = USB_OTG_FS_MAX_PACKET_SIZE ;
gusbcfg.b.usbtrdtim = 5;
}
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, gusbcfg.d32);
/* Clear interrupt */
gintsts.d32 = 0;
gintsts.b.enumdone = 1;
@ -804,16 +806,16 @@ static uint32_t DCD_HandleEnumDone_ISR(USB_OTG_CORE_HANDLE *pdev)
*/
static uint32_t DCD_IsoINIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef gintsts;
USB_OTG_GINTSTS_TypeDef gintsts;
gintsts.d32 = 0;
USBD_DCD_INT_fops->IsoINIncomplete (pdev);
USBD_DCD_INT_fops->IsoINIncomplete (pdev);
/* Clear interrupt */
gintsts.b.incomplisoin = 1;
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
return 1;
}
@ -825,12 +827,12 @@ static uint32_t DCD_IsoINIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev)
*/
static uint32_t DCD_IsoOUTIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_GINTSTS_TypeDef gintsts;
USB_OTG_GINTSTS_TypeDef gintsts;
gintsts.d32 = 0;
USBD_DCD_INT_fops->IsoOUTIncomplete (pdev);
USBD_DCD_INT_fops->IsoOUTIncomplete (pdev);
/* Clear interrupt */
gintsts.b.incomplisoout = 1;
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
@ -856,11 +858,11 @@ static uint32_t DCD_ReadDevInEP (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
/**
* @}
*/
*/
/**
* @}
*/
*/
/**
* @}

8
platform/mcu/STM32F4xx/linker_script.ld
Wyświetl plik

@ -12,7 +12,7 @@
/* stack top in large ram, at an address which, masked with 0x2FFE0000,
gives 0x20000000
*/
_stack_top = 0x2001FFFF;
_stack_top = 0x2001FFFC;
/* temporary set heap end equal to stack top */
_heap_end = _stack_top;
@ -33,13 +33,13 @@ MEMORY
SECTIONS
{
. = 0;
/* .text section: code goes to flash */
.text :
{
/* Startup code must go at address 0 */
KEEP(*(.isr_vector))
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
@ -61,7 +61,7 @@ SECTIONS
/* C++ Static constructors/destructors (eabi) */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))