Fixed bug in Module 17 output stream driver causing outputStream_sync() to hang when a stream was opened for the second time

pull/68/head
Silvano Seva 2022-03-25 10:15:48 +01:00
rodzic eb22e4b4b2
commit 12dc186129
1 zmienionych plików z 12 dodań i 15 usunięć

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@ -54,7 +54,10 @@ void stopTransfer()
DMA1_Stream5->CR &= ~DMA_SxCR_EN; DMA1_Stream5->CR &= ~DMA_SxCR_EN;
DMA1_Stream6->CR &= ~DMA_SxCR_EN; DMA1_Stream6->CR &= ~DMA_SxCR_EN;
running = false; // Clear flags
running = false;
reqFinish = false;
circularMode = false;
} }
/** /**
@ -75,21 +78,15 @@ void __attribute__((used)) DMA_Handler()
stopTransfer(); stopTransfer();
} }
// Clear interrupt flags for stream 5 // Clear interrupt flags for stream 5 and 6
if(DMA1->HISR & 0x00000F40) uint32_t mask = DMA_HISR_TEIF5
{ | DMA_HISR_TCIF5
DMA1->HIFCR = DMA_HIFCR_CTEIF5 | DMA_HISR_HTIF5
| DMA_HIFCR_CTCIF5 | DMA_HISR_TEIF6
| DMA_HIFCR_CHTIF5; | DMA_HISR_TCIF6
} | DMA_HISR_HTIF6;
// Clear interrupt flags for stream 6 DMA1->HIFCR = DMA1->HISR & mask;
if(DMA1->HISR & 0x003D0000)
{
DMA1->HIFCR = DMA_HIFCR_CTEIF6
| DMA_HIFCR_CTCIF6
| DMA_HIFCR_CHTIF6;
}
// Finally, wake up eventual pending threads // Finally, wake up eventual pending threads
if(dmaWaiting == 0) return; if(dmaWaiting == 0) return;