kopia lustrzana https://github.com/OpenRTX/OpenRTX
136 wiersze
4.6 KiB
C
136 wiersze
4.6 KiB
C
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/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* Copyright 2004-2020 Silicon Laboratories Inc. www.silabs.com
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*
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* SPDX-License-Identifier: APACHE-2.0
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*
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* This software is subject to an open source license and is distributed by
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* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CACHE CPU MODULE
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*
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* Filename : cpu_cache.h
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* Version : v1.32.00
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* MODULE
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*
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* Note(s) : (1) This cache CPU header file is protected from multiple pre-processor inclusion through use of
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* the cache CPU module present pre-processor macro definition.
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*********************************************************************************************************
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*/
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#ifndef CPU_CACHE_MODULE_PRESENT /* See Note #1. */
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#define CPU_CACHE_MODULE_PRESENT
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/*
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*********************************************************************************************************
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* EXTERNS
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*********************************************************************************************************
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*/
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#ifdef CPU_CACHE_MODULE
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#define CPU_CACHE_EXT
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#else
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#define CPU_CACHE_EXT extern
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#endif
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/*
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*********************************************************************************************************
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* INCLUDE FILES
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*********************************************************************************************************
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*/
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#include <cpu.h>
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#include <lib_def.h>
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#include <cpu_cfg.h>
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/*
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*********************************************************************************************************
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* CACHE CONFIGURATION
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*********************************************************************************************************
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*/
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#ifndef CPU_CFG_CACHE_MGMT_EN
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#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED
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#endif
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/*
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*********************************************************************************************************
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* CACHE OPERATIONS DEFINES
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*********************************************************************************************************
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*/
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#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
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#ifndef CPU_DCACHE_RANGE_FLUSH
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#define CPU_DCACHE_RANGE_FLUSH(addr_start, len) CPU_DCache_RangeFlush(addr_start, len)
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#endif /* CPU_DCACHE_RANGE_FLUSH */
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#else
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#define CPU_DCACHE_RANGE_FLUSH(addr_start, len)
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#endif /* CPU_CFG_CACHE_MGMT_EN) */
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#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
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#ifndef CPU_DCACHE_RANGE_INV
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#define CPU_DCACHE_RANGE_INV(addr_start, len) CPU_DCache_RangeInv(addr_start, len)
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#endif /* CPU_DCACHE_RANGE_INV */
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#else
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#define CPU_DCACHE_RANGE_INV(addr_start, len)
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#endif /* CPU_CFG_CACHE_MGMT_EN) */
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/*
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*********************************************************************************************************
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* FUNCTION PROTOTYPES
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*********************************************************************************************************
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*/
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#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void CPU_Cache_Init (void);
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void CPU_DCache_RangeFlush(void *addr_start,
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CPU_ADDR len);
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void CPU_DCache_RangeInv (void *addr_start,
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CPU_ADDR len);
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CFG_CACHE_MGMT_EN */
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/*
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*********************************************************************************************************
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* MODULE END
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*
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* Note(s) : (1) See 'cpu_core.h MODULE'.
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*********************************************************************************************************
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*/
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#endif /* End of CPU core module include. */
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