NucleoTNC

Autor	SHA1	Wiadomość	Data
Rob Riggs	6783a39e8c	Fix DAC output glitch when starting transmission.	2018-08-11 16:06:07 -05:00
Rob Riggs	0250e5a7f2	Fix & enable I2C EEPROM support.	2018-08-05 21:24:38 -05:00
Rob Riggs	e6b920d0fb	Fix defect in L4 HAL version 1.12.0 LL ADC code that misconfigures the ADC channel.	2018-08-05 19:25:40 -05:00
Rob Riggs	15e6de9744	Use KISS-based logging since SWO does not work on Nucleo32.	2018-08-05 19:23:38 -05:00
Rob Riggs	11f18d27ce	Make it save to use LEDs in ISR.	2018-08-05 19:22:56 -05:00
Rob Riggs	82aa99dd4f	Remove extraneous logging.	2018-08-05 19:22:15 -05:00
Rob Riggs	5b2b150b0d	Move some pins around, use LED3, and name the AUDIO_IN pin. Initialize DAC, Op Amp and ADC in main(). Increase ADC clock to 80MHz and enable 16x oversampling. Increase sample time to 6.5 cycles. Support up to 16-bit ADC values (oversampling). Widen the DFT bins used for twist detection. Increase the amount of error checking we do. Improve input gain setting algorithm.	2018-08-05 19:21:52 -05:00
Rob Riggs	660ebffb73	Use tickless idle, and add stack overflow detection.	2018-08-05 19:07:21 -05:00
Rob Riggs	9ecd997cad	Add TNC code, openocd configs, etc.	2018-07-29 21:34:53 -05:00
Rob Riggs	5d38c4a1ad	Add support for using SRAM2 separate from SRAM1.	2018-07-29 12:43:52 -05:00
Rob Riggs	89a8cfbcbe	Initial STM32CubeMX code generation.	2018-07-29 12:40:09 -05:00
Mobilinkd LLC	907bc90726	Initial commit	2018-07-29 12:30:28 -05:00