kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
390 wiersze
8.2 KiB
C
390 wiersze
8.2 KiB
C
/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68000 emulation
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*
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* (c) 1995 Bernd Schmidt
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*/
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#include "shared.h"
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#include "events.h"
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#include "gui.h"
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#include "memory.h"
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#include "custom.h"
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#include "newcpu.h"
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#ifdef HAS_ERSATZ
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#include "ersatz.h"
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#endif
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#include "arduinoproto.h"
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const int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
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const int imm8_table[] = { 8,1,2,3,4,5,6,7 };
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int broken_in;
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#ifdef INTEL_FLAG_OPT
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union flagu intel_flag_lookup[256];
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#endif
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struct regstruct regs;
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union flagu regflags;
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UWORD *pc_pref;
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int cnt=0;
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#include "cputbl.h"
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#include "cputable.h"
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void MakeSR(void)
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{
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#if 0
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assert((NFLG & 1) == NFLG);
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assert((regs.s & 1) == regs.s);
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assert((regs.x & 1) == regs.x);
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assert((CFLG & 1) == CFLG);
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assert((VFLG & 1) == VFLG);
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assert((ZFLG & 1) == ZFLG);
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#endif
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regs.sr = ((regs.t << 15) | (regs.s << 13) | (regs.intmask << 8)
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| (regs.x << 4) | (NFLG << 3) | (ZFLG << 2) | (VFLG << 1)
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| CFLG);
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}
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void MakeFromSR(void)
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{
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int olds = regs.s;
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regs.t = (regs.sr >> 15) & 1;
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regs.s = (regs.sr >> 13) & 1;
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regs.intmask = (regs.sr >> 8) & 7;
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regs.x = (regs.sr >> 4) & 1;
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NFLG = (regs.sr >> 3) & 1;
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ZFLG = (regs.sr >> 2) & 1;
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VFLG = (regs.sr >> 1) & 1;
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CFLG = regs.sr & 1;
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if (olds != regs.s) {
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CPTR temp = regs.usp;
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regs.usp = regs.a[7];
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regs.a[7] = temp;
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}
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specialflags |= SPCFLAG_INT;
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if (regs.t)
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specialflags |= SPCFLAG_TRACE;
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else
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specialflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
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}
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void Exception(int nr)
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{
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//emu_printf("exception");
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MakeSR();
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if (!regs.s) {
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CPTR temp = regs.usp;
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regs.usp = regs.a[7];
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regs.a[7] = temp;
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regs.s = 1;
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}
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if (CPU_LEVEL > 0) {
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regs.a[7] -= 2;
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put_word (regs.a[7], nr * 4);
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}
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regs.a[7] -= 4;
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put_long (regs.a[7], m68k_getpc ());
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regs.a[7] -= 2;
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put_word (regs.a[7], regs.sr);
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m68k_setpc(get_long(regs.vbr + 4*nr));
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regs.t = 0;
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specialflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
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}
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static void Interrupt(int nr)
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{
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//assert(nr < 8 && nr >= 0);
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Exception(nr+24);
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regs.intmask = nr;
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specialflags |= SPCFLAG_INT;
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}
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static int caar, cacr;
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void m68k_move2c (int regno, ULONG *regp)
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{
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if (CPU_LEVEL == 1 && (regno & 0x7FF) > 1)
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op_illg (0x4E7B);
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else
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switch (regno) {
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case 0: regs.sfc = *regp; break;
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case 1: regs.dfc = *regp; break;
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case 2: cacr = *regp & 0xFF; break;
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case 0x800: regs.usp = *regp; break;
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case 0x801: regs.vbr = *regp; break;
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case 0x802: caar = *regp & 0xFF; break;
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default:
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op_illg (0x4E7B);
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break;
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}
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}
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void m68k_movec2 (int regno, ULONG *regp)
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{
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if (CPU_LEVEL == 1 && (regno & 0x7FF) > 1)
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op_illg (0x4E7A);
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else
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switch (regno) {
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case 0: *regp = regs.sfc; break;
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case 1: *regp = regs.dfc; break;
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case 2: *regp = cacr; break;
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case 0x800: *regp = regs.usp; break;
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case 0x801: *regp = regs.vbr; break;
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case 0x802: *regp = caar; break;
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default:
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op_illg (0x4E7A);
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break;
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}
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}
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extern void m68k_divl (UWORD opcode, ULONG src, UWORD extra)
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{
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if (src == 0)
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return;
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#ifdef INT_64BIT
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if (extra & 0x800) {
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/* signed variant */
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INT_64BIT a = regs.d[(extra >> 12) & 7];
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INT_64BIT quot, rem;
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if (extra & 0x400)
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a |= (INT_64BIT)regs.d[extra & 7] << 32;
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rem = a % src;
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quot = a / src;
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if ((extra & 0x400) && (extra & 7) != ((extra >> 12) & 7))
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regs.d[extra & 7] = rem;
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regs.d[(extra >> 12) & 7] = quot;
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} else {
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/* unsigned */
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unsigned INT_64BIT a = regs.d[(extra >> 12) & 7];
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unsigned INT_64BIT quot, rem;
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if (extra & 0x400)
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a |= (INT_64BIT)regs.d[extra & 7] << 32;
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rem = a % src;
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quot = a / src;
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if ((extra & 0x400) && (extra & 7) != ((extra >> 12) & 7))
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regs.d[extra & 7] = rem;
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regs.d[(extra >> 12) & 7] = quot;
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}
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#endif
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}
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extern void m68k_mull (UWORD opcode, ULONG src, UWORD extra)
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{
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#ifdef INT_64BIT
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if (extra & 0x800) {
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/* signed variant */
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INT_64BIT a = (LONG)regs.d[(extra >> 12) & 7];
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a *= (LONG)src;
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if ((extra & 0x400) && (extra & 7) != ((extra >> 12) & 7))
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regs.d[extra & 7] = a >> 32;
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regs.d[(extra >> 12) & 7] = (ULONG)a;
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} else {
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/* unsigned */
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unsigned INT_64BIT a = (ULONG)regs.d[(extra >> 12) & 7];
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unsigned INT_64BIT quot, rem;
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a *= src;
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if ((extra & 0x400) && (extra & 7) != ((extra >> 12) & 7))
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regs.d[extra & 7] = a >> 32;
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regs.d[(extra >> 12) & 7] = (ULONG)a;
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}
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#endif
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}
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void MC68000_reset(void)
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{
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emu_printf("reset");
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regs.a[7] = get_long(0x00f80000);
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m68k_setpc(get_long(0x00f80004));
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regs.s = 1;
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regs.stopped = 0;
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regs.t = 0;
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specialflags = 0;
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regs.intmask = 7;
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regs.vbr = regs.sfc = regs.dfc = 0;
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customreset();
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}
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void op_illg(ULONG opcode)
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{
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if (opcode == 0x4E7B && get_long(0x10) == 0
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&& (m68k_getpc() & 0xF80000) == 0xF80000)
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{
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fprintf(stderr, "Your Kickstart requires a 68020 CPU. Giving up.\n");
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broken_in = 1;
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specialflags |= SPCFLAG_BRK;
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quit_program = 1;
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}
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#ifdef HAS_ERSATZ
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if (opcode == 0xF00D && ((m68k_getpc() & 0xF80000) == 0xF80000)) {
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/* This is from the dummy Kickstart replacement */
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ersatz_perform (nextiword ());
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return;
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}
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#endif
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regs.pc_p--;
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if ((opcode & 0xF000) == 0xF000) {
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if ((opcode & 0xE00) == 0x200)
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Exception(0xB);
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else
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switch (opcode & 0x1FF) {
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case 0x17:
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regs.pc_p+=2;
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break;
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default:
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regs.pc_p++;
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}
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return;
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}
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if ((opcode & 0xF000) == 0xA000) {
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Exception(0xA);
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return;
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}
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fprintf(stderr, "Illegal instruction: %04x\n", opcode);
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Exception(4);
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}
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//static int n_insns=0, n_spcinsns=0;
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static __inline__ void do_hardware(void)
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{
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//emu_printf("do_hardware");
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if (specialflags & SPCFLAG_BLIT) {
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do_blitter();
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#ifdef NO_FAST_BLITTER
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do_blitter();
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do_blitter();
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do_blitter();
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#endif
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}
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if (specialflags & SPCFLAG_DISK) {
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do_disk(); /* This is not critical. Four calls make disk */
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do_disk(); /* loading quite fast. */
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do_disk();
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do_disk();
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}
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}
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extern UWORD *chipmemory;
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UWORD *chipmemoryadd=NULL;
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void MC68000_run(void)
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{
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for(;;) {
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if (quit_program) {
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break;
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}
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UWORD opcode;
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/* assert (!regs.stopped && !(specialflags & SPCFLAG_STOP)); */
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//emu_printi(regs.pc + (regs.pc_p-pc_pref)*2);
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opcode = nextiword();
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//if (chipmemory != chipmemoryadd) {
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//LONG add = regs.pc + (regs.pc_p-pc_pref)*2;
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//emu_printf("a:");
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//emu_printi(add);
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//emu_printf("o");
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//emu_printi(opcode);
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//}
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//emu_printf("o");
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//emu_printi(opcode);
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#ifdef COUNT_INSTRS
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instrcount[opcode]++;
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#endif
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(*cpufunctbl[opcode])(opcode);
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#ifndef NO_EXCEPTION_3
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if (buserr) {
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Exception(3);
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buserr = 0;
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}
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#endif
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/*n_insns++;*/
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do_cycles();
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if (specialflags) {
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/*n_spcinsns++;*/
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while (specialflags & SPCFLAG_BLTNASTY) {
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do_cycles();
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do_hardware();
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}
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if (specialflags & SPCFLAG_DOTRACE) {
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Exception(9);
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}
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while (specialflags & SPCFLAG_STOP) {
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do_cycles();
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do_hardware();
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if (specialflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
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int intr = intlev();
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specialflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
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specialflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
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if (intr != -1 && intr > regs.intmask) {
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Interrupt(intr);
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regs.stopped = 0;
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specialflags &= ~SPCFLAG_STOP;
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}
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}
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}
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if (specialflags & SPCFLAG_TRACE) {
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specialflags &= ~SPCFLAG_TRACE;
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specialflags |= SPCFLAG_DOTRACE;
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}
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#ifdef WANT_SLOW_MULTIPLY
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/* Kludge for Hardwired demo. The guys who wrote it should be
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* mutilated. */
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if (specialflags & SPCFLAG_EXTRA_CYCLES) {
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do_cycles ();
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do_cycles ();
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do_cycles ();
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do_cycles ();
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specialflags &= ~SPCFLAG_EXTRA_CYCLES;
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}
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#endif
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do_hardware();
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if (specialflags & SPCFLAG_DOINT) {
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int intr = intlev();
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specialflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
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if (intr != -1 && intr > regs.intmask) {
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Interrupt(intr);
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regs.stopped = 0;
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}
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}
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if (specialflags & SPCFLAG_INT) {
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specialflags &= ~SPCFLAG_INT;
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specialflags |= SPCFLAG_DOINT;
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}
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if (specialflags & SPCFLAG_BRK) {
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specialflags &= ~SPCFLAG_BRK;
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return;
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}
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}
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}
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}
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void MC68000_step(void)
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{
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specialflags |= SPCFLAG_BRK;
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MC68000_run();
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}
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void MC68000_skip(CPTR nextpc)
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{
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broken_in = 0;
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specialflags |= SPCFLAG_BRK;
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do {
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MC68000_step();
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} while (nextpc != m68k_getpc() && !broken_in);
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}
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