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Add MainA/B and SubA/B to dummy rig for testing 

Add debug cache display for same when applicable
https://github.com/Hamlib/Hamlib/issues/730
pull/739/head
Mike Black W9MDB 2021-07-05 11:24:07 -05:00
rodzic dd0187ede6
commit 21ade6493a
2 zmienionych plików z 15 dodań i 1 usunięć
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6
rigs/dummy/dummy.c
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@ -431,9 +431,13 @@ static int dummy_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
{
case RIG_VFO_MAIN:
case RIG_VFO_A: priv->vfo_a.freq = freq; break;
case RIG_VFO_MAIN_A: priv->vfo_maina.freq = freq; break;
case RIG_VFO_MAIN_B: priv->vfo_mainb.freq = freq; break;
case RIG_VFO_SUB:
case RIG_VFO_B: priv->vfo_b.freq = freq; break;
case RIG_VFO_SUB_A: priv->vfo_suba.freq = freq; break;
case RIG_VFO_SUB_B: priv->vfo_subb.freq = freq; break;
case RIG_VFO_C: priv->vfo_c.freq = freq; break;
}
@ -2172,7 +2176,7 @@ struct rig_caps dummy_caps =
RIG_MODEL(RIG_MODEL_DUMMY),
.model_name = "Dummy",
.mfg_name = "Hamlib",
.version = "20210702.0",
.version = "20210705.0",
.copyright = "LGPL",
.status = RIG_STATUS_STABLE,
.rig_type = RIG_TYPE_OTHER,

10
src/rig.c
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@ -367,6 +367,16 @@ static void cache_show(RIG *rig, const char *func, int line)
"%s(%d): freqMainB=%.0f, modeMainB=%s, widthMainB=%d\n", func, line,
rig->state.cache.freqMainB, rig_strrmode(rig->state.cache.modeMainB),
(int)rig->state.cache.widthMainB);
if (rig->state.vfo_list & RIG_VFO_SUB_A) {
rig_debug(RIG_DEBUG_CACHE,
"%s(%d): freqSubA=%.0f, modeSubA=%s, widthSubA=%d\n", func, line,
rig->state.cache.freqSubA, rig_strrmode(rig->state.cache.modeSubA),
(int)rig->state.cache.widthSubA);
rig_debug(RIG_DEBUG_CACHE,
"%s(%d): freqSubB=%.0f, modeSubB=%s, widthSubB=%d\n", func, line,
rig->state.cache.freqSubB, rig_strrmode(rig->state.cache.modeSubB),
(int)rig->state.cache.widthSubB);
}
}
/**