kopia lustrzana https://github.com/Hamlib/Hamlib
Add VFO UP DOWN to PowerSDR
rodzic
0849172dc5
commit
17539bb68a
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@ -42,7 +42,7 @@
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#define F6K_LEVEL_ALL (RIG_LEVEL_SLOPE_HIGH|RIG_LEVEL_SLOPE_LOW|RIG_LEVEL_KEYSPD)
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#define F6K_VFO (RIG_VFO_A|RIG_VFO_B)
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#define POWERSDR_VFO_OP (RIG_OP_BAND_UP|RIG_OP_BAND_DOWN)
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#define POWERSDR_VFO_OP (RIG_OP_BAND_UP|RIG_OP_BAND_DOWN|RIG_OP_UP|RIG_OP_DOWN)
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#define F6K_ANTS (RIG_ANT_1|RIG_ANT_2|RIG_ANT_3)
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@ -1231,7 +1231,7 @@ const struct rig_caps powersdr_caps =
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RIG_MODEL(RIG_MODEL_POWERSDR),
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.model_name = "PowerSDR/Thetis",
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.mfg_name = "FlexRadio/ANAN",
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.version = "20220512.0",
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.version = "20220516.0",
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.copyright = "LGPL",
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.status = RIG_STATUS_STABLE,
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.rig_type = RIG_TYPE_TRANSCEIVER,
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