2003-06-22 19:36:37 +00:00
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/*
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* Hamlib Rotator backend - SDR-1000
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* Copyright (c) 2003 by Stephane Fillod
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*
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2003-09-28 15:36:57 +00:00
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* $Id: sdr1k.c,v 1.2 2003-09-28 15:36:57 fillods Exp $
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2003-06-22 19:36:37 +00:00
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*
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* This library is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Library General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* You should have received a copy of the GNU Library General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdlib.h>
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#include <string.h> /* String function definitions */
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#include <unistd.h> /* UNIX standard function definitions */
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#ifdef HAVE_SYS_IOCTL_H
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#include <sys/ioctl.h>
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#endif
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#include "hamlib/rig.h"
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#include "serial.h"
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#include "misc.h"
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#include "bandplan.h"
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#include "register.h"
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#include "sdr1k.h"
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static int sdr1k_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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static int sdr1k_get_freq(RIG *rig, vfo_t vfo, freq_t *freq);
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static int sdr1k_reset(RIG *rig, reset_t reset);
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static int sdr1k_init(RIG *rig);
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static int sdr1k_open(RIG *rig);
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static int sdr1k_close(RIG *rig);
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static int sdr1k_cleanup(RIG *rig);
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static int sdr1k_set_ptt (RIG *rig, vfo_t vfo, ptt_t ptt);
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typedef enum { L_EXT = 0, L_BAND = 1, L_DDS0 = 2, L_DDS1 = 3 } latch_t;
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static void write_latch (RIG *rig, latch_t which, int value, int mask);
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static void write_reg (RIG *rig, int addr, int data);
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static void set_bit (RIG *rig, latch_t reg, int bit, int state);
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2003-09-28 15:36:57 +00:00
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#define DEFAULT_XTAL MHz(200)
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2003-06-22 19:36:37 +00:00
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struct sdr1k_priv_data {
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2003-09-28 15:36:57 +00:00
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int shadow[4]; /* shadow latches */
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freq_t xtal; /* base XTAL */
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2003-06-22 19:36:37 +00:00
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};
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2003-09-28 15:36:57 +00:00
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#define SDR1K_FUNC RIG_FUNC_MUTE
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#define SDR1K_LEVEL RIG_LEVEL_PREAMP
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2003-06-22 19:36:37 +00:00
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#define SDR1K_PARM RIG_PARM_NONE
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#define SDR1K_MODES (RIG_MODE_NONE)
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#define SDR1K_VFO RIG_VFO_A
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#define SDR1K_ANTS 0
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/* ************************************************************************* */
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/*
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* http://www.flex-radio.com
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* SDR-1000 rig capabilities.
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*
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*
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* TODO: set_gain? RIG_FUNC_MUTE, set_external_pin?
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*
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* def set_gain (self, high):
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* self.set_bit(0, 7, high)
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*
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* def set_mute (self, mute = 1):
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* self.set_bit(1, 7, mute)
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*
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* def set_unmute (self):
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* self.set_bit(1, 7, 0)
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*
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* def set_external_pin (self, pin, on = 1):
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* assert (pin < 8 and pin > 0), "Out of range 1..7"
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* self.set_bit(0, pin-1, on)
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2003-09-28 15:36:57 +00:00
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*
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* set_conf(XTAL)
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2003-06-22 19:36:37 +00:00
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*/
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const struct rig_caps sdr1k_rig_caps = {
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.rig_model = RIG_MODEL_SDR1000,
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.model_name = "SDR-1000",
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.mfg_name = "Flex-radio",
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2003-09-28 15:36:57 +00:00
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.version = "0.1.1",
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2003-06-22 19:36:37 +00:00
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.copyright = "LGPL",
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.status = RIG_STATUS_NEW,
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.rig_type = RIG_TYPE_TUNER,
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.targetable_vfo = 0,
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.ptt_type = RIG_PTT_RIG,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_PARALLEL,
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.has_get_func = SDR1K_FUNC,
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.has_set_func = SDR1K_FUNC,
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.has_get_level = SDR1K_LEVEL,
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.has_set_level = RIG_LEVEL_SET(SDR1K_LEVEL),
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.has_get_parm = SDR1K_PARM,
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.has_set_parm = RIG_PARM_SET(SDR1K_PARM),
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.chan_list = {
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RIG_CHAN_END,
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},
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.scan_ops = RIG_SCAN_NONE,
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.vfo_ops = RIG_OP_NONE,
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.transceive = RIG_TRN_OFF,
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.attenuator = { RIG_DBLST_END, },
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2003-09-28 15:36:57 +00:00
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.preamp = { 20, RIG_DBLST_END, },
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2003-06-22 19:36:37 +00:00
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.rx_range_list1 = { {.start=Hz(1),.end=MHz(65),.modes=SDR1K_MODES,
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.low_power=-1,.high_power=-1,SDR1K_VFO},
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RIG_FRNG_END, },
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.tx_range_list1 = {
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/* restricted to ham band */
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FRQ_RNG_HF(1,SDR1K_MODES, W(1),W(1),SDR1K_VFO,SDR1K_ANTS),
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FRQ_RNG_6m(1,SDR1K_MODES, W(1),W(1),SDR1K_VFO,SDR1K_ANTS),
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RIG_FRNG_END, },
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.rx_range_list2 = { {.start=Hz(1),.end=MHz(65),.modes=SDR1K_MODES,
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.low_power=-1,.high_power=-1,SDR1K_VFO},
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RIG_FRNG_END, },
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.tx_range_list2 = {
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/* restricted to ham band */
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FRQ_RNG_HF(2,SDR1K_MODES, W(1),W(1),SDR1K_VFO,SDR1K_ANTS),
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FRQ_RNG_6m(2,SDR1K_MODES, W(1),W(1),SDR1K_VFO,SDR1K_ANTS),
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RIG_FRNG_END, },
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.tuning_steps = { {SDR1K_MODES,1},
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RIG_TS_END,
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},
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.priv = NULL, /* priv */
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.rig_init = sdr1k_init,
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.rig_open = sdr1k_open,
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.rig_close = sdr1k_close,
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.rig_cleanup = sdr1k_cleanup,
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.set_freq = sdr1k_set_freq,
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.get_freq = sdr1k_get_freq,
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.set_ptt = sdr1k_set_ptt,
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.reset = sdr1k_reset,
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2003-09-28 15:36:57 +00:00
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// .set_level= sdr1k_set_level,
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// .set_func = sdr1k_set_func,
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2003-06-22 19:36:37 +00:00
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};
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/* ************************************************************************* */
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DECLARE_INITRIG_BACKEND(flexradio)
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{
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rig_debug(RIG_DEBUG_VERBOSE, "%s called\n", __FUNCTION__);
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rig_register(&sdr1k_rig_caps);
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return RIG_OK;
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}
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/* ************************************************************************* */
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int sdr1k_init(RIG *rig)
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{
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struct sdr1k_priv_data *priv;
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priv = (struct sdr1k_priv_data*)malloc(sizeof(struct sdr1k_priv_data));
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if (!priv) {
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/* whoops! memory shortage! */
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return -RIG_ENOMEM;
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}
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rig->state.current_freq = RIG_FREQ_NONE;
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2003-09-28 15:36:57 +00:00
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priv->xtal = DEFAULT_XTAL;
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2003-06-22 19:36:37 +00:00
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rig->state.priv = (void*)priv;
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return RIG_OK;
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}
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2003-09-28 15:36:57 +00:00
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static void pdelay(RIG *rig)
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{
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usleep(1);
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}
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2003-06-22 19:36:37 +00:00
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int sdr1k_open(RIG *rig)
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{
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struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
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priv->shadow[0] = 0;
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priv->shadow[1] = 0;
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priv->shadow[2] = 0;
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priv->shadow[3] = 0;
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sdr1k_reset(rig, 1);
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write_latch (rig, L_DDS1, 0x00, 0xC0); /* Reset low, WRS/ low */
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write_reg (rig, 0x20, 0x40);
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return RIG_OK;
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}
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int sdr1k_close(RIG *rig)
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{
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/* place holder.. */
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return RIG_OK;
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}
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int sdr1k_cleanup(RIG *rig)
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{
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struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
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if (priv) {
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free(priv);
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}
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rig->state.priv = NULL;
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return RIG_OK;
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}
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int sdr1k_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
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{
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2003-09-28 15:36:57 +00:00
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struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
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2003-06-22 19:36:37 +00:00
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int i, band;
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double ftw;
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/* set_band */
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if (freq <= MHz(2.25))
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band = 0;
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else if ( freq <= MHz(5.5))
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band = 1;
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else if (freq <= MHz(11))
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band = 3; /* due to wiring mistake on board */
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else if (freq <= MHz(22))
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band = 2; /* due to wiring mistake on board */
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else if (freq <= MHz(37.5))
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band = 4;
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else
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band = 5;
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2003-09-28 15:36:57 +00:00
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rig_debug(RIG_DEBUG_VERBOSE, "%s %lld band %d\n", __FUNCTION__, freq, band);
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2003-06-22 19:36:37 +00:00
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write_latch (rig, L_BAND, 1 << band, 0x3f);
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2003-09-28 15:36:57 +00:00
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ftw = (double)freq / priv->xtal ;
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2003-06-22 19:36:37 +00:00
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2003-09-28 15:36:57 +00:00
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for (i = 0; i<6; i++) {
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2003-06-22 19:36:37 +00:00
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int word;
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word = (int)(ftw * 256);
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ftw = ftw*256 - word;
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2003-09-28 15:36:57 +00:00
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rig_debug(RIG_DEBUG_TRACE, "DDS %d [%02x]\n", i, word);
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2003-06-22 19:36:37 +00:00
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write_reg (rig, 4+i, word);
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}
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return RIG_OK;
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}
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int sdr1k_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
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{
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*freq = rig->state.current_freq;
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return RIG_OK;
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}
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int sdr1k_reset (RIG *rig, reset_t reset)
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{
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port_t *pport = &rig->state.rigport;
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2003-09-28 15:36:57 +00:00
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par_lock (pport);
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2003-06-22 19:36:37 +00:00
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par_write_control (pport, 0x0F);
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2003-09-28 15:36:57 +00:00
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pdelay(rig);
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par_unlock (pport);
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2003-06-22 19:36:37 +00:00
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write_latch (rig, L_EXT, 0x00, 0xff);
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write_latch (rig, L_BAND, 0x00, 0xff);
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write_latch (rig, L_DDS0, 0x80, 0xff); /* hold DDS in reset */
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write_latch (rig, L_DDS1, 0x00, 0xff);
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return RIG_OK;
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}
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int sdr1k_set_ptt (RIG *rig, vfo_t vfo, ptt_t ptt)
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{
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set_bit(rig, 1, 6, ptt == RIG_PTT_ON);
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return RIG_OK;
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}
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void
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write_latch (RIG *rig, latch_t which, int value, int mask)
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{
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struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
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port_t *pport = &rig->state.rigport;
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if (!(0 <= which && which <= 3))
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return;
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2003-09-28 15:36:57 +00:00
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par_lock (pport);
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2003-06-22 19:36:37 +00:00
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priv->shadow[which] = (priv->shadow[which] & ~mask) | (value & mask);
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par_write_data (pport, priv->shadow[which]);
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2003-09-28 15:36:57 +00:00
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pdelay(rig);
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2003-06-22 19:36:37 +00:00
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par_write_control (pport, 0x0F ^ (1 << which));
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2003-09-28 15:36:57 +00:00
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pdelay(rig);
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2003-06-22 19:36:37 +00:00
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par_write_control (pport, 0x0F);
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2003-09-28 15:36:57 +00:00
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pdelay(rig);
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par_unlock (pport);
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2003-06-22 19:36:37 +00:00
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}
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void
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write_reg (RIG *rig, int addr, int data)
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{
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write_latch (rig, L_DDS1, addr & 0x3f, 0x3f);
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write_latch (rig, L_DDS0, data, 0xff);
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write_latch (rig, L_DDS1, 0x40, 0x40);
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write_latch (rig, L_DDS1, 0x00, 0x40);
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}
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void
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set_bit (RIG *rig, latch_t reg, int bit, int state)
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|
|
|
{
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|
int val;
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val = state ? 1<<bit : 0;
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write_latch (rig, reg, val, 1<<bit);
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}
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