kopia lustrzana https://github.com/Hamlib/Hamlib
* First working version! still a WIP though..
* reworked parallel port access: invert logic to make it more natural * explicit ppdev locking git-svn-id: https://hamlib.svn.sourceforge.net/svnroot/hamlib/trunk@1544 7ae35d74-ebe9-4afe-98af-79ac388436b8Hamlib-1.2.0
Stéphane Fillod, F8CFE
rodzic
f9478f5e97
commit
de179ba56b
|
|
@ -2,7 +2,7 @@
|
|||
* Hamlib Rotator backend - SDR-1000
|
||||
* Copyright (c) 2003 by Stephane Fillod
|
||||
*
|
||||
* $Id: sdr1k.c,v 1.1 2003-06-22 19:36:37 fillods Exp $
|
||||
* $Id: sdr1k.c,v 1.2 2003-09-28 15:36:57 fillods Exp $
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Library General Public License as
|
||||
|
|
@ -55,14 +55,16 @@ static void write_reg (RIG *rig, int addr, int data);
|
|||
static void set_bit (RIG *rig, latch_t reg, int bit, int state);
|
||||
|
||||
|
||||
#define DEFAULT_XTAL MHz(200)
|
||||
|
||||
struct sdr1k_priv_data {
|
||||
int shadow[4]; /* shadow latches */
|
||||
int shadow[4]; /* shadow latches */
|
||||
freq_t xtal; /* base XTAL */
|
||||
};
|
||||
|
||||
|
||||
#define SDR1K_FUNC RIG_FUNC_NONE
|
||||
#define SDR1K_LEVEL RIG_LEVEL_NONE
|
||||
#define SDR1K_FUNC RIG_FUNC_MUTE
|
||||
#define SDR1K_LEVEL RIG_LEVEL_PREAMP
|
||||
#define SDR1K_PARM RIG_PARM_NONE
|
||||
|
||||
#define SDR1K_MODES (RIG_MODE_NONE)
|
||||
|
|
@ -92,13 +94,15 @@ struct sdr1k_priv_data {
|
|||
* def set_external_pin (self, pin, on = 1):
|
||||
* assert (pin < 8 and pin > 0), "Out of range 1..7"
|
||||
* self.set_bit(0, pin-1, on)
|
||||
*
|
||||
* set_conf(XTAL)
|
||||
*/
|
||||
|
||||
const struct rig_caps sdr1k_rig_caps = {
|
||||
.rig_model = RIG_MODEL_SDR1000,
|
||||
.model_name = "SDR-1000",
|
||||
.mfg_name = "Flex-radio",
|
||||
.version = "0.1",
|
||||
.version = "0.1.1",
|
||||
.copyright = "LGPL",
|
||||
.status = RIG_STATUS_NEW,
|
||||
.rig_type = RIG_TYPE_TUNER,
|
||||
|
|
@ -120,7 +124,7 @@ const struct rig_caps sdr1k_rig_caps = {
|
|||
.vfo_ops = RIG_OP_NONE,
|
||||
.transceive = RIG_TRN_OFF,
|
||||
.attenuator = { RIG_DBLST_END, },
|
||||
.preamp = { RIG_DBLST_END, },
|
||||
.preamp = { 20, RIG_DBLST_END, },
|
||||
|
||||
.rx_range_list1 = { {.start=Hz(1),.end=MHz(65),.modes=SDR1K_MODES,
|
||||
.low_power=-1,.high_power=-1,SDR1K_VFO},
|
||||
|
|
@ -154,6 +158,8 @@ const struct rig_caps sdr1k_rig_caps = {
|
|||
.get_freq = sdr1k_get_freq,
|
||||
.set_ptt = sdr1k_set_ptt,
|
||||
.reset = sdr1k_reset,
|
||||
// .set_level= sdr1k_set_level,
|
||||
// .set_func = sdr1k_set_func,
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -182,12 +188,18 @@ int sdr1k_init(RIG *rig)
|
|||
}
|
||||
|
||||
rig->state.current_freq = RIG_FREQ_NONE;
|
||||
priv->xtal = DEFAULT_XTAL;
|
||||
|
||||
rig->state.priv = (void*)priv;
|
||||
|
||||
return RIG_OK;
|
||||
}
|
||||
|
||||
static void pdelay(RIG *rig)
|
||||
{
|
||||
usleep(1);
|
||||
}
|
||||
|
||||
int sdr1k_open(RIG *rig)
|
||||
{
|
||||
struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
|
||||
|
|
@ -226,6 +238,7 @@ int sdr1k_cleanup(RIG *rig)
|
|||
|
||||
int sdr1k_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
|
||||
{
|
||||
struct sdr1k_priv_data *priv = (struct sdr1k_priv_data *)rig->state.priv;
|
||||
int i, band;
|
||||
double ftw;
|
||||
|
||||
|
|
@ -242,17 +255,19 @@ int sdr1k_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
|
|||
band = 4;
|
||||
else
|
||||
band = 5;
|
||||
|
||||
|
||||
rig_debug(RIG_DEBUG_VERBOSE, "%s %lld band %d\n", __FUNCTION__, freq, band);
|
||||
|
||||
write_latch (rig, L_BAND, 1 << band, 0x3f);
|
||||
|
||||
ftw = freq / MHz(200);
|
||||
ftw = (double)freq / priv->xtal ;
|
||||
|
||||
for (i = 0; i<5; i++) {
|
||||
for (i = 0; i<6; i++) {
|
||||
int word;
|
||||
|
||||
word = (int)(ftw * 256);
|
||||
ftw = ftw*256 - word;
|
||||
// print (('%d [%02x]') % (i, word))
|
||||
rig_debug(RIG_DEBUG_TRACE, "DDS %d [%02x]\n", i, word);
|
||||
write_reg (rig, 4+i, word);
|
||||
}
|
||||
|
||||
|
|
@ -271,7 +286,10 @@ int sdr1k_reset (RIG *rig, reset_t reset)
|
|||
{
|
||||
port_t *pport = &rig->state.rigport;
|
||||
|
||||
par_lock (pport);
|
||||
par_write_control (pport, 0x0F);
|
||||
pdelay(rig);
|
||||
par_unlock (pport);
|
||||
write_latch (rig, L_EXT, 0x00, 0xff);
|
||||
write_latch (rig, L_BAND, 0x00, 0xff);
|
||||
write_latch (rig, L_DDS0, 0x80, 0xff); /* hold DDS in reset */
|
||||
|
|
@ -298,10 +316,15 @@ write_latch (RIG *rig, latch_t which, int value, int mask)
|
|||
if (!(0 <= which && which <= 3))
|
||||
return;
|
||||
|
||||
par_lock (pport);
|
||||
priv->shadow[which] = (priv->shadow[which] & ~mask) | (value & mask);
|
||||
par_write_data (pport, priv->shadow[which]);
|
||||
pdelay(rig);
|
||||
par_write_control (pport, 0x0F ^ (1 << which));
|
||||
pdelay(rig);
|
||||
par_write_control (pport, 0x0F);
|
||||
pdelay(rig);
|
||||
par_unlock (pport);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue