From f110225173a77326aac029321cdb6491bfa640f6 Mon Sep 17 00:00:00 2001 From: Kevin Hester Date: Sat, 16 Jan 2021 10:34:46 +0800 Subject: [PATCH] Update variant file and qspi flash programming settings for new ttgoeink Note: bin/qspi-flash-test.sh contains a script you can use for basic bench programming and testing of the serial spi flash over SWD --- bin/qspi-flash-test.sh | 2 +- nrf52/ttgo_eink_qpsi.ini | 21 ++++------- nrf52/ttgo_eink_qpsi0.1.ini | 69 +++++++++++++++++++++++++++++++++++++ variants/eink/variant.h | 9 ++--- 4 files changed, 82 insertions(+), 19 deletions(-) create mode 100644 nrf52/ttgo_eink_qpsi0.1.ini diff --git a/bin/qspi-flash-test.sh b/bin/qspi-flash-test.sh index 7fc186b5..6c03635d 100755 --- a/bin/qspi-flash-test.sh +++ b/bin/qspi-flash-test.sh @@ -1,6 +1,6 @@ # You probably don't need this - it is a basic test of the serial flash on the TTGO eink board -nrfjprog -qspiini nrf52/ttgo_eink_qpsi.ini --qspieraseall +nrfjprog --qspiini nrf52/ttgo_eink_qpsi.ini --qspieraseall nrfjprog --qspiini nrf52/ttgo_eink_qpsi.ini --memwr 0x12000000 --val 0xdeadbeef --verify nrfjprog --qspiini nrf52/ttgo_eink_qpsi.ini --readqspi spi.hex objdump -s spi.hex | less diff --git a/nrf52/ttgo_eink_qpsi.ini b/nrf52/ttgo_eink_qpsi.ini index d477db8e..053c8675 100644 --- a/nrf52/ttgo_eink_qpsi.ini +++ b/nrf52/ttgo_eink_qpsi.ini @@ -8,10 +8,10 @@ MemSize = 0x200000 ; Define the desired ReadMode. Valid options are FASTREAD, READ2O, READ2IO, READ4O and READ4IO -ReadMode = READ2IO +ReadMode = READ4IO ; Define the desired WriteMode. Valid options are PP, PP2O, PP4O and PP4IO -WriteMode = PP +WriteMode = PP4IO ; Define the desired AddressMode. Valid options are BIT24 and BIT32 AddressMode = BIT24 @@ -38,12 +38,10 @@ DIO0Pin = 12 DIO0Port = 1 DIO1Pin = 13 DIO1Port = 1 - -;These two pins are not connected, but we must name something -DIO2Pin = 3 -DIO2Port = 1 +DIO2Pin = 7 +DIO2Port = 0 DIO3Pin = 5 -DIO3Port = 1 +DIO3Port = 0 ; Define the Index of the Write In Progress (WIP) bit in the status register. Valid options are in the range of 0 to 7. WIPIndex = 0 @@ -57,13 +55,8 @@ PPSize = PAGE256 ; Numbers can be given in decimal, hex (starting with either 0x or 0X) and binary (starting with either 0b or 0B) formats. ; The custom instructions will be executed in the order found. -; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) enabling the Quad Operation and the High Performance -; mode for the MX25R6435F memory present in the nRF52840 DK. -;InitializationCustomInstruction = 0x06 -;InitializationCustomInstruction = 0x01, [0x40, 0, 0x2] - ; For MX25R1635F on TTGO board, only two data lines are connected -; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) disabling Quad Operation and the High Performance +; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) enabling Quad Operation and the High Performance ; mode. For normal operation you might want low power mode instead. InitializationCustomInstruction = 0x06 -InitializationCustomInstruction = 0x01, [0x00, 0, 0x2] +InitializationCustomInstruction = 0x01, [0x40, 0, 0x2] diff --git a/nrf52/ttgo_eink_qpsi0.1.ini b/nrf52/ttgo_eink_qpsi0.1.ini new file mode 100644 index 00000000..d477db8e --- /dev/null +++ b/nrf52/ttgo_eink_qpsi0.1.ini @@ -0,0 +1,69 @@ +; nrfjprog.exe configuration file. + +; Note: QSPI flash is mapped into memory at address 0x12000000 + +[DEFAULT_CONFIGURATION] +; Define the capacity of the flash memory device in bytes. Set to 0 if no external memory device is present in your board. +; MX25R1635F is 16Mbit/2Mbyte +MemSize = 0x200000 + +; Define the desired ReadMode. Valid options are FASTREAD, READ2O, READ2IO, READ4O and READ4IO +ReadMode = READ2IO + +; Define the desired WriteMode. Valid options are PP, PP2O, PP4O and PP4IO +WriteMode = PP + +; Define the desired AddressMode. Valid options are BIT24 and BIT32 +AddressMode = BIT24 + +; Define the desired Frequency. Valid options are M2, M4, M8, M16 and M32 +Frequency = M16 + +; Define the desired SPI mode. Valid options are MODE0 and MODE3 +SpiMode = MODE0 + +; Define the desired SckDelay. Valid options are in the range 0 to 255 +SckDelay = 0x80 + +; Define the desired IO level for DIO2 and DIO3 during a custom instruction. Valid options are LEVEL_HIGH and LEVEL_LOW +CustomInstructionIO2Level = LEVEL_LOW +CustomInstructionIO3Level = LEVEL_HIGH + +; Define the assigned pins for the QSPI peripheral. Valid options are those existing in your device +CSNPin = 15 +CSNPort = 1 +SCKPin = 14 +SCKPort = 1 +DIO0Pin = 12 +DIO0Port = 1 +DIO1Pin = 13 +DIO1Port = 1 + +;These two pins are not connected, but we must name something +DIO2Pin = 3 +DIO2Port = 1 +DIO3Pin = 5 +DIO3Port = 1 + +; Define the Index of the Write In Progress (WIP) bit in the status register. Valid options are in the range of 0 to 7. +WIPIndex = 0 + +; Define page size for commands. Valid sizes are PAGE256 and PAGE512. +PPSize = PAGE256 + +; Custom instructions to send to the external memory after initialization. Format is instruction code plus data to send in between optional brakets. +; These instructions will be executed each time the qspi peripheral is initiated by nrfjprog. +; To improve execution speed on consecutive interations with QSPI, you can run nrfjprog once with custom initialization, and then comment out the lines below. +; Numbers can be given in decimal, hex (starting with either 0x or 0X) and binary (starting with either 0b or 0B) formats. +; The custom instructions will be executed in the order found. + +; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) enabling the Quad Operation and the High Performance +; mode for the MX25R6435F memory present in the nRF52840 DK. +;InitializationCustomInstruction = 0x06 +;InitializationCustomInstruction = 0x01, [0x40, 0, 0x2] + +; For MX25R1635F on TTGO board, only two data lines are connected +; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) disabling Quad Operation and the High Performance +; mode. For normal operation you might want low power mode instead. +InitializationCustomInstruction = 0x06 +InitializationCustomInstruction = 0x01, [0x00, 0, 0x2] diff --git a/variants/eink/variant.h b/variants/eink/variant.h index 6e3fedd6..dad11f5b 100644 --- a/variants/eink/variant.h +++ b/variants/eink/variant.h @@ -149,7 +149,7 @@ No longer populated on PCB */ #define WIRE_INTERFACES_COUNT 1 -#define PIN_WIRE_SDA (26) // Not connected on board? +#define PIN_WIRE_SDA (26) #define PIN_WIRE_SCL (27) /* touch sensor, active high */ @@ -167,8 +167,8 @@ External serial flash WP25R1635FZUIL0 #define PIN_QSPI_CS (32 + 15) #define PIN_QSPI_IO0 (32 + 12) // MOSI if using two bit interface #define PIN_QSPI_IO1 (32 + 13) // MISO if using two bit interface -//#define PIN_QSPI_IO2 22 // WP if using two bit interface (i.e. not used) -//#define PIN_QSPI_IO3 23 // HOLD if using two bit interface (i.e. not used) +#define PIN_QSPI_IO2 (0 + 7) // WP if using two bit interface (i.e. not used) +#define PIN_QSPI_IO3 (0 + 5) // HOLD if using two bit interface (i.e. not used) // On-board QSPI Flash #define EXTERNAL_FLASH_DEVICES MX25R1635F @@ -223,7 +223,8 @@ External serial flash WP25R1635FZUIL0 */ #define PIN_GPS_WAKE (32 + 2) // An output to wake GPS, low means allow sleep, high means force wake -#define PIN_GPS_PPS (32 + 4) // Pulse per second input from the GPS +// Seems to be missing on this new board +// #define PIN_GPS_PPS (32 + 4) // Pulse per second input from the GPS #define PIN_GPS_TX (32 + 9) // This is for bits going TOWARDS the CPU #define PIN_GPS_RX (32 + 8) // This is for bits going TOWARDS the GPS