From 6a4ef7e1d12dc209a6aeaacefecedd8047877c37 Mon Sep 17 00:00:00 2001 From: geeksville Date: Mon, 28 Sep 2020 14:09:19 -0700 Subject: [PATCH] eink board serial flash seems to work --- bin/qspi-flash-test.sh | 6 ++++ nrf52/ttgo_eink_qpsi.ini | 69 ++++++++++++++++++++++++++++++++++++++++ variants/eink/variant.h | 37 +++++++++++---------- 3 files changed, 95 insertions(+), 17 deletions(-) create mode 100755 bin/qspi-flash-test.sh create mode 100644 nrf52/ttgo_eink_qpsi.ini diff --git a/bin/qspi-flash-test.sh b/bin/qspi-flash-test.sh new file mode 100755 index 00000000..7fc186b5 --- /dev/null +++ b/bin/qspi-flash-test.sh @@ -0,0 +1,6 @@ +# You probably don't need this - it is a basic test of the serial flash on the TTGO eink board + +nrfjprog -qspiini nrf52/ttgo_eink_qpsi.ini --qspieraseall +nrfjprog --qspiini nrf52/ttgo_eink_qpsi.ini --memwr 0x12000000 --val 0xdeadbeef --verify +nrfjprog --qspiini nrf52/ttgo_eink_qpsi.ini --readqspi spi.hex +objdump -s spi.hex | less diff --git a/nrf52/ttgo_eink_qpsi.ini b/nrf52/ttgo_eink_qpsi.ini new file mode 100644 index 00000000..d477db8e --- /dev/null +++ b/nrf52/ttgo_eink_qpsi.ini @@ -0,0 +1,69 @@ +; nrfjprog.exe configuration file. + +; Note: QSPI flash is mapped into memory at address 0x12000000 + +[DEFAULT_CONFIGURATION] +; Define the capacity of the flash memory device in bytes. Set to 0 if no external memory device is present in your board. +; MX25R1635F is 16Mbit/2Mbyte +MemSize = 0x200000 + +; Define the desired ReadMode. Valid options are FASTREAD, READ2O, READ2IO, READ4O and READ4IO +ReadMode = READ2IO + +; Define the desired WriteMode. Valid options are PP, PP2O, PP4O and PP4IO +WriteMode = PP + +; Define the desired AddressMode. Valid options are BIT24 and BIT32 +AddressMode = BIT24 + +; Define the desired Frequency. Valid options are M2, M4, M8, M16 and M32 +Frequency = M16 + +; Define the desired SPI mode. Valid options are MODE0 and MODE3 +SpiMode = MODE0 + +; Define the desired SckDelay. Valid options are in the range 0 to 255 +SckDelay = 0x80 + +; Define the desired IO level for DIO2 and DIO3 during a custom instruction. Valid options are LEVEL_HIGH and LEVEL_LOW +CustomInstructionIO2Level = LEVEL_LOW +CustomInstructionIO3Level = LEVEL_HIGH + +; Define the assigned pins for the QSPI peripheral. Valid options are those existing in your device +CSNPin = 15 +CSNPort = 1 +SCKPin = 14 +SCKPort = 1 +DIO0Pin = 12 +DIO0Port = 1 +DIO1Pin = 13 +DIO1Port = 1 + +;These two pins are not connected, but we must name something +DIO2Pin = 3 +DIO2Port = 1 +DIO3Pin = 5 +DIO3Port = 1 + +; Define the Index of the Write In Progress (WIP) bit in the status register. Valid options are in the range of 0 to 7. +WIPIndex = 0 + +; Define page size for commands. Valid sizes are PAGE256 and PAGE512. +PPSize = PAGE256 + +; Custom instructions to send to the external memory after initialization. Format is instruction code plus data to send in between optional brakets. +; These instructions will be executed each time the qspi peripheral is initiated by nrfjprog. +; To improve execution speed on consecutive interations with QSPI, you can run nrfjprog once with custom initialization, and then comment out the lines below. +; Numbers can be given in decimal, hex (starting with either 0x or 0X) and binary (starting with either 0b or 0B) formats. +; The custom instructions will be executed in the order found. + +; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) enabling the Quad Operation and the High Performance +; mode for the MX25R6435F memory present in the nRF52840 DK. +;InitializationCustomInstruction = 0x06 +;InitializationCustomInstruction = 0x01, [0x40, 0, 0x2] + +; For MX25R1635F on TTGO board, only two data lines are connected +; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) disabling Quad Operation and the High Performance +; mode. For normal operation you might want low power mode instead. +InitializationCustomInstruction = 0x06 +InitializationCustomInstruction = 0x01, [0x00, 0, 0x2] diff --git a/variants/eink/variant.h b/variants/eink/variant.h index 6ab4e073..c1781c84 100644 --- a/variants/eink/variant.h +++ b/variants/eink/variant.h @@ -30,7 +30,7 @@ soonish: hook cdc acm device to debug output fix bootloader to use two buttons - remove bootloader hacks -get second button working in app load +DONE get second button working in app load fix display width and height clean up eink drawing to not have the nasty timeout hack measure current draws @@ -48,8 +48,14 @@ add factory/power on self test use tp_ser_io as a button, it goes high when pressed unify eink display classes feedback to give: -remove ipx connector for nfc, instead use two caps and loop traces on the back of the board as an antenna? +* remove ipx connector for nfc, instead use two caps and loop traces on the back of the board as an antenna? + +* I've made the serial flash chip work, but if you do a new spin of the board I recommend: +connect pin 3 and pin 7 of U4 to spare GPIOs on the processor (instead of their current connections), +This would allow using 4 bit wide interface mode to the serial flash. +doubling the transfer speed! see example here: +https://infocenter.nordicsemi.com/topic/ug_nrf52840_dk/UG/nrf52840_DK/hw_external_memory.html?cp=4_0_4_7_4 */ /*---------------------------------------------------------------------------- @@ -108,11 +114,10 @@ static const uint8_t A0 = PIN_A0; */ /* -This serial port is _also_ connected to the incoming D+/D- pins from the USB header. FIXME, figure out how that is supposed to -work. +No longer populated on PCB */ -#define PIN_SERIAL2_RX (0 + 6) -#define PIN_SERIAL2_TX (0 + 8) +//#define PIN_SERIAL2_RX (0 + 6) +//#define PIN_SERIAL2_TX (0 + 8) // #define PIN_SERIAL2_EN (0 + 17) /** @@ -130,23 +135,21 @@ work. #define PIN_RTC_INT (0 + 16) // Interrupt from the PCF8563 RTC /* - -FIXME define/FIX flash access +External serial flash WP25R1635FZUIL0 +*/ // QSPI Pins -#define PIN_QSPI_SCK 19 -#define PIN_QSPI_CS 17 -#define PIN_QSPI_IO0 20 -#define PIN_QSPI_IO1 21 -#define PIN_QSPI_IO2 22 -#define PIN_QSPI_IO3 23 +#define PIN_QSPI_SCK (32 + 14) +#define PIN_QSPI_CS (32 + 15) +#define PIN_QSPI_IO0 (32 + 12) // MOSI if using two bit interface +#define PIN_QSPI_IO1 (32 + 13) // MISO if using two bit interface +//#define PIN_QSPI_IO2 22 // WP if using two bit interface (i.e. not used) +//#define PIN_QSPI_IO3 23 // HOLD if using two bit interface (i.e. not used) // On-board QSPI Flash -#define EXTERNAL_FLASH_DEVICES MX25R6435F +#define EXTERNAL_FLASH_DEVICES MX25R1635F #define EXTERNAL_FLASH_USE_QSPI -*/ - /* * Lora radio */