sforkowany z mirror/meshtastic-firmware
Remove unused scripts
Sacha Weatherstone
rodzic
9037a51f83
commit
5b8ce7fe07
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#!/usr/bin/env bash
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# You probably don't want to use this script, it programs a custom bootloader build onto a nrf52 board
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set -e
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# dependencies
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# apt install srecord
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BOOTDIR=/home/kevinh/development/meshtastic/Adafruit_nRF52_Bootloader
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BOARD=othernet_ppr1
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BOOTVER=0.3.2
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BOOTNUM=128
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BOOTSHA=gc01b9ea
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SDCODE=s113
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SDVER=7.2.0
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PROJ=ppr1
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# FIXME for nRF52840 use 0xff000, for nRF52833 use 0x7f000
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BOOTSET=0x7f000
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nrfjprog --eraseall -f nrf52
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# this generates an intel hex file that can be programmed into a NRF52 to tell the adafruit bootloader that the current app image is valid
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# Bootloader settings are at BOOTLOADER_SETTINGS (rw) : ORIGIN = 0xFF000, LENGTH = 0x1000
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# first 4 bytes should be 0x01 to indicate valid app image
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# second 4 bytes should be 0x00 to indicate no CRC required for image
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echo "01 00 00 00 00 00 00 00" | xxd -r -p - >/tmp/bootconf.bin
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srec_cat /tmp/bootconf.bin -binary -offset $BOOTSET -output /tmp/bootconf.hex -intel
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echo Generating merged hex file from .pio/build/$PROJ/firmware.hex
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mergehex -o ${BOARD}_full.hex -m $BOOTDIR/_build/build-$BOARD/${BOARD}_bootloader-$BOOTVER-$BOOTNUM-$BOOTSHA-dirty_${SDCODE}_$SDVER.hex .pio/build/$PROJ/firmware.hex /tmp/bootconf.hex
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echo Telling bootloader app region is valid and telling CPU to run
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nrfjprog --program ${BOARD}_full.hex -f nrf52 --reset
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# nrfjprog --readuicr /tmp/uicr.hex; objdump -s /tmp/uicr.hex | less
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#!/usr/bin/env bash
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# You probably don't want to use this script, it programs a custom bootloader build onto a nrf52 board
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set -e
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BOOTDIR=/home/kevinh/development/meshtastic/Adafruit_nRF52_Bootloader
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nrfjprog --eraseall -f nrf52
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# to get tool run "sudo apt-get install srecord"
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# this generates an intel hex file that can be programmed into a NRF52 to tell the adafruit bootloader that the current app image is valid
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# Bootloader settings are at BOOTLOADER_SETTINGS (rw) : ORIGIN = 0xFF000, LENGTH = 0x1000
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# first 4 bytes should be 0x01 to indicate valid app image
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# second 4 bytes should be 0x00 to indicate no CRC required for image
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echo "01 00 00 00 00 00 00 00" | xxd -r -p - >/tmp/bootconf.bin
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srec_cat /tmp/bootconf.bin -binary -offset 0xff000 -output /tmp/bootconf.hex -intel
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echo Generating merged hex file
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mergehex -m $BOOTDIR/_build/build-ttgo_eink/ttgo_eink_bootloader-0.3.2-213-gf67f592-dirty_s140_6.1.1.hex .pio/build/eink/firmware.hex /tmp/bootconf.hex -o ttgo_eink_full.hex
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echo Telling bootloader app region is valid and telling CPU to run
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nrfjprog --program ttgo_eink_full.hex -f nrf52 --reset
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# nrfjprog --readuicr /tmp/uicr.hex; objdump -s /tmp/uicr.hex | less
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# Example OpenOCD configuration file for ESP-WROOM-32 module.
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# By default, the following configuration is used:
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# - dual core debugging
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# - support for listing FreeRTOS tasks is enabled
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# - OpenOCD is configured to set SPI flash voltage at 3.3V
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# by keeping MTDI bootstrapping pin low
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#
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# Use variables listed below to customize this.
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# Variables can be modified in this file or set on the command line.
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#
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# For example, OpenOCD can be started for single core ESP32 debugging on
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# ESP-WROVER-KIT with ESP-WROOM-32 module as follows:
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#
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# openocd -f interface/ftdi/esp32_devkitj_v1.cfg -c 'set ESP32_ONLYCPU 1' -f board/esp-wroom-32.cfg
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#
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# If a different JTAG interface is used, change the first -f option.
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#
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# If OpenOCD is built from source, pass an additional -s option to specify
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# the location of 'tcl' directory:
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#
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# src/openocd -s tcl <rest of the command line>
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#
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# Note:
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# For ESP32-WROVER module use 'esp32-wrover.cfg' configuration file
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# ESP-WROOM-32 and ESP32-WROVER have different flash voltage setting
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# The ESP32 only supports JTAG.
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transport select jtag
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# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
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# do not relate to OpenOCD trying to read from a memory range without physical
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# memory being present there), you can try lowering this.
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#
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# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
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# if CPU frequency is 160MHz or 240MHz.
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adapter_khz 20000
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# If single core debugging is required, uncomment the following line
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# set ESP32_ONLYCPU 1
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# To disable RTOS support, uncomment the following line
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# set ESP32_RTOS none
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# Tell OpenOCD which SPI flash voltage is used by the board (3.3 or 1.8)
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# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
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# chip runs at. When a hard reset happens (e.g. because someone switches the board off
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# and on) the ESP32 will use the current TDI value as the bootstrap value because the
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# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
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# bootstrapping. These lines basically set the idle value of the TDI line to a
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# specified value, therefore reducing the chance of a bad bootup due to a bad flash
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# voltage greatly.
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# This option defaults to 3.3, if not set. To override the default, uncomment
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# the following line:
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# set ESP32_FLASH_VOLTAGE 1.8
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# Set semihosting I/O base dir
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# set ESP_SEMIHOST_BASEDIR ""
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# Source the ESP32 configuration file
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source [find target/esp32.cfg]
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#!/usr/bin/env bash
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mosquitto_sub -h mqtt.meshtastic.org -v -t \$SYS/\# -t msh/+/stat/\# -t msh/+/json/\#
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# mosquitto_sub -h test.mosquitto.org -v -t mesh/\# -F "%j"
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#!/usr/bin/env bash
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mosquitto_pub -h mqtt.meshtastic.org -u meshdev -P large4cats -t msh/1/stat/FakeNode -m online -d
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#!/usr/bin/env bash
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# JLinkRTTViewer
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JLinkRTTClient
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#!/usr/bin/env bash
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JLinkGDBServerCLExe -if SWD -select USB -port 2331 -device NRF52832_XXAA
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#!/usr/bin/env bash
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JLinkGDBServerCLExe -if SWD -select USB -port 2331 -device NRF52833_XXAA
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#!/usr/bin/env bash
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JLinkGDBServerCLExe -if SWD -select USB -port 2331 -device NRF52840_XXAA -SuppressInfoUpdateFW -DisableAutoUpdateFW -rtos GDBServer/RTOSPlugin_FreeRTOS
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#!/usr/bin/env bash
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esptool.py --baud 921600 write_flash 0x10000 release/archive/old/firmware-tbeam-EU865-1.0.0.bin
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echo "Erasing the otadata partition, which will turn off flash flippy-flop and force the first image to be used"
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esptool.py --baud 921600 erase_region 0xe000 0x2000
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#!/usr/bin/env bash
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esptool.py --baud 921600 write_flash 0x10000 release/archive/old/firmware-tbeam-1.1.50.bin
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#!/usr/bin/env bash
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set -e
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source bin/version.sh
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esptool.py --baud 921600 write_flash 0x10000 release/latest/bins/firmware-heltec-US-$VERSION.bin
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#!/usr/bin/env bash
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set -e
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VERSION=`bin/buildinfo.py`
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FILENAME=release/latest/bins/universal/firmware-tbeam-$VERSION.bin
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echo Installing $FILENAME
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esptool.py --baud 921600 write_flash 0x10000 $FILENAME
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#!/usr/bin/env bash
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set -e
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source bin/version.sh
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esptool.py --baud 921600 write_flash 0x10000 release/latest/bins/universal/firmware-tbeam-$VERSION.bin
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#!/usr/bin/env bash
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pio run --upload-port /dev/ttyUSB0 -t upload -t monitor
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#!/usr/bin/env bash
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pio run --upload-port /dev/ttyUSB1 -t upload -t monitor
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#!/usr/bin/env bash
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set -e
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echo uploading to usb1
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pio run --upload-port /dev/ttyUSB1 -t upload
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echo uploading to usb0
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pio run --upload-port /dev/ttyUSB0 -t upload -t monitor
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#!/usr/bin/env bash
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set -e
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TARG=tbeam
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pio run -e $TARG
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echo uploading to usb1
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pio run --upload-port /dev/ttyUSB1 -t upload -e $TARG &
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echo uploading to usb0
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pio run --upload-port /dev/ttyUSB0 -t upload -e $TARG &
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wait
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#!/usr/bin/env bash
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# /home/kevinh/.platformio/packages/tool-openocd-esp32/bin/openocd -s /home/kevinh/.platformio/packages/tool-openocd-esp32 -c gdb_port pipe; tcl_port disabled; telnet_port disabled -s /home/kevinh/.platformio/packages/tool-openocd-esp32/share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg
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/home/kevinh/.platformio/packages/tool-openocd-esp32/bin/openocd -s /home/kevinh/.platformio/packages/tool-openocd-esp32 -s /home/kevinh/.platformio/packages/tool-openocd-esp32/share/openocd/scripts -f interface/jlink.cfg -f ./lora32-openocd.cfg
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#!/usr/bin/env bash
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pio device monitor -b 921600
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#!/usr/bin/env bash
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pio device monitor -p /dev/ttyUSB1 -b 921600
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#!/usr/bin/env bash
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set -e
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echo "building for t-echo"
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pio run --environment t-echo
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echo "Converting to uf2 for NRF52 Adafruit bootloader - double tap on the reset button to force bootloader entry"
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bin/uf2conv.py .pio/build/t-echo/firmware.hex -f 0xADA52840
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cp flash.uf2 /media/kevinh/FTH*BOOT/
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#!/usr/bin/env bash
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set -e
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echo "Converting to uf2 for NRF52 Adafruit bootloader"
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bin/uf2conv.py .pio/build/rak4631/firmware.hex -f 0xADA52840
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cp flash.uf2 /media/kevinh/FTH*BOOT/
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#!/usr/bin/env bash
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pio run --upload-port /dev/ttyUSB1 -t upload
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19
gdbinit
19
gdbinit
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# Setup Monitor Mode Debugging
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# Per .platformio/packages/framework-arduinoadafruitnrf52-old/cores/nRF5/linker/nrf52840_s140_v6.ld
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# our appload starts at 0x26000
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# Disable for now because our version on board doesn't support monitor mode debugging
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# mon exec SetMonModeDebug=1
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# mon exec SetMonModeVTableAddr=0x26000
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# echo setting RTTAddr
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# eval "monitor exec SetRTTAddr %p", &_SEGGER_RTT
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# the jlink debugger seems to want a pause after reset before we tell it to start running
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define restart
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echo Restarting
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monitor reset
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shell sleep 1
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cont
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end
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