From 4b5cfaf9baf6b0f4bd2a0740b9590268841e3d14 Mon Sep 17 00:00:00 2001
From: geeksville <kevinh@geeksville.com>
Date: Fri, 5 Jun 2020 11:00:18 -0700
Subject: [PATCH] changes from bringing up PPR

---
 bin/nrf52-gdbserver.sh  |  0
 gdbinit                 |  4 ++--
 src/nrf52/UC1701Spi.cpp | 16 +++++++++++++++-
 variants/ppr/variant.h  |  2 +-
 4 files changed, 18 insertions(+), 4 deletions(-)
 mode change 100644 => 100755 bin/nrf52-gdbserver.sh

diff --git a/bin/nrf52-gdbserver.sh b/bin/nrf52-gdbserver.sh
old mode 100644
new mode 100755
diff --git a/gdbinit b/gdbinit
index bb345813..9950fac4 100644
--- a/gdbinit
+++ b/gdbinit
@@ -6,8 +6,8 @@
 # mon exec SetMonModeDebug=1
 # mon exec SetMonModeVTableAddr=0x26000
 
-echo setting RTTAddr
-eval "monitor exec SetRTTAddr %p", &_SEGGER_RTT
+# echo setting RTTAddr
+# eval "monitor exec SetRTTAddr %p", &_SEGGER_RTT
 
 # the jlink debugger seems to want a pause after reset before we tell it to start running
 define restart
diff --git a/src/nrf52/UC1701Spi.cpp b/src/nrf52/UC1701Spi.cpp
index d6f236cf..d653b645 100644
--- a/src/nrf52/UC1701Spi.cpp
+++ b/src/nrf52/UC1701Spi.cpp
@@ -33,4 +33,18 @@ class UC1701Spi : public OLEDDisplay
     void display(void) {}
 
   private:
-};
\ No newline at end of file
+};
+
+#include "variant.h"
+#include <UC1701.h>
+static UC1701 lcd(PIN_SPI_SCK, PIN_SPI_MOSI, ERC12864_CS, ERC12864_CD);
+
+
+void testLCD() {
+  // PCD8544-compatible displays may have a different resolution...
+  lcd.begin();
+
+  // Write a piece of text on the first line...
+  lcd.setCursor(0, 0);
+  lcd.print("Hello, World!");
+}
\ No newline at end of file
diff --git a/variants/ppr/variant.h b/variants/ppr/variant.h
index d59e1750..95b2803b 100644
--- a/variants/ppr/variant.h
+++ b/variants/ppr/variant.h
@@ -132,7 +132,7 @@ static const uint8_t SCK = PIN_SPI_SCK;
 #define SX1262_CS (10)
 #define SX1262_DIO1 (20)
 #define SX1262_DIO2 (26)
-#define SX1262_BUSY (18)
+#define SX1262_BUSY (31) // Supposed to be P0.18 but because of reworks, now on P0.31 (18)
 #define SX1262_RESET (17)
 // #define SX1262_ANT_SW (32 + 10)
 #define SX1262_RXEN (22)