sforkowany z mirror/meshtastic-firmware
lorarelay wip
geeksville
rodzic
0cfeeba2e2
commit
08e5bd728b
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@ -19,12 +19,11 @@
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*/
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#include "variant.h"
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#include "nrf.h"
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#include "wiring_constants.h"
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#include "wiring_digital.h"
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#include "nrf.h"
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const uint32_t g_ADigitalPinMap[] =
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{
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const uint32_t g_ADigitalPinMap[] = {
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// D0 .. D13
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25, // D0 is P0.25 (UART TX)
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24, // D1 is P0.24 (UART RX
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@ -37,9 +36,9 @@ const uint32_t g_ADigitalPinMap[] =
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16, // D8 is P0.16 (NeoPixel)
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26, // D9 is P0.26
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27, // D10 is P0.27
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6, // D11 is P0.06
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8, // D12 is P0.08
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41, // D13 is P1.09
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6, // D11 is P0.06 D_RES (IPS display reset)
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8, // D12 is P0.08 D_CS (IPS display chip select)
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41, // D13 is P1.09 BLT (IPS display backlight)
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// D14 .. D21 (aka A0 .. A7)
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4, // D14 is P0.04 (A0)
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@ -61,38 +60,38 @@ const uint32_t g_ADigitalPinMap[] =
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14, // D26 is P0.14 (SPI SCK )
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// QSPI pins (not exposed via any header / test point)
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19, // D27 is P0.19 (QSPI CLK)
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20, // D28 is P0.20 (QSPI CS)
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17, // D29 is P0.17 (QSPI Data 0)
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22, // D30 is P0.22 (QSPI Data 1)
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23, // D31 is P0.23 (QSPI Data 2)
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21, // D32 is P0.21 (QSPI Data 3)
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// 19, // P0.19 (QSPI CLK)
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// 20, // P0.20 (QSPI CS)
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// 17, // P0.17 (QSPI Data 0)
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// 22, // P0.22 (QSPI Data 1)
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// 23, // P0.23 (QSPI Data 2)
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// 21, // P0.21 (QSPI Data 3)
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// The remaining NFC pin
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9, // D33 is P0.09 (NFC1, exposed only via test point on bottom of board)
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9, // D27 P0.09 (NFC1, exposed only via test point on bottom of board)
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// Thus, there are 34 defined pins
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// The remaining pins are not usable:
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//
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//
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// The following pins were never listed as they were considered unusable
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0, // P0.00 is XL1 (attached to 32.768kHz crystal)
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1, // P0.01 is XL2 (attached to 32.768kHz crystal)
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18, // P0.18 is RESET (attached to switch)
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32, // P1.00 is SWO (attached to debug header)
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// 0, // P0.00 is XL1 (attached to 32.768kHz crystal) Never expose as GPIOs
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// 1, // P0.01 is XL2 (attached to 32.768kHz crystal)
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18, // D28 P0.18 is RESET (attached to switch)
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// 32, // P1.00 is SWO (attached to debug header)
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// The remaining pins are not connected (per schematic)
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33, //D38 is P1.01 is not connected per schematic
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35, //D39 is P1.03 is not connected per schematic
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36, //D40 P1.04 is not connected per schematic
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37, //D41 P1.05 is not connected per schematic
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38, //D42 P1.06 is not connected per schematic
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39, //D43 P1.07 is not connected per schematic
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43, //D44 P1.11 is not connected per schematic
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44, //D45 is P1.12 is not connected per schematic
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45, //D46 P1.13 is not connected per schematic
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46, //D47 is P1.14 is not connected per schematic
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// D29-D43
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27, // P0.27 E22-SX1262 DIO1
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28, // P0.28 E22-SX1262 DIO2
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30, // P0.30 E22-SX1262 TXEN
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32 + 1, // P1.01 BTN_UP
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32 + 2, // P1.02 SWITCH
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35, // P1.03 E22-SX1262 NSS
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36, // P1.04 is not connected per schematic
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37, // P1.05 is not connected per schematic
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38, // P1.06 is not connected per schematic
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39, // P1.07 is not connected per schematic
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32 + 8, // P1.08 E22-SX1262 BUSY
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43, // P1.11 is not connected per schematic
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32 + 12, // P1.12 E22-SX1262 RESET
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45, // P1.13 is not connected per schematic
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46, // P1.14 is not connected per schematic
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};
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void initVariant()
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@ -104,4 +103,3 @@ void initVariant()
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pinMode(PIN_LED2, OUTPUT);
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ledOff(PIN_LED2);
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}
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@ -16,8 +16,8 @@
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _VARIANT_FEATHER52840_
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#define _VARIANT_FEATHER52840_
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#ifndef _VARIANT_LORA_RELAY_V1_
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#define _VARIANT_LORA_RELAY_V1_
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/** Master clock frequency */
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#define VARIANT_MCK (64000000ul)
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@ -32,14 +32,13 @@
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#include "WVariant.h"
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#ifdef __cplusplus
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extern "C"
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{
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extern "C" {
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#endif // __cplusplus
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// Number of pins defined in PinDescription array
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#define PINS_COUNT (48)
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#define NUM_DIGITAL_PINS (48)
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#define NUM_ANALOG_INPUTS (6) // A6 is used for battery, A7 is analog reference
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#define PINS_COUNT (43)
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#define NUM_DIGITAL_PINS (43)
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#define NUM_ANALOG_INPUTS (8) // A6 is used for battery, A7 is analog reference
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#define NUM_ANALOG_OUTPUTS (0)
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// LEDs
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@ -119,16 +118,16 @@ static const uint8_t SCK = PIN_SPI_SCK ;
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#define PIN_WIRE_SCL (23)
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// QSPI Pins
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#define PIN_QSPI_SCK 27
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#define PIN_QSPI_CS 28
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#define PIN_QSPI_IO0 29
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#define PIN_QSPI_IO1 30
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#define PIN_QSPI_IO2 31
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#define PIN_QSPI_IO3 32
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//#define PIN_QSPI_SCK 27
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//#define PIN_QSPI_CS 28
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//#define PIN_QSPI_IO0 29
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//#define PIN_QSPI_IO1 30
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//#define PIN_QSPI_IO2 31
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//#define PIN_QSPI_IO3 32
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// On-board QSPI Flash
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#define EXTERNAL_FLASH_DEVICES GD25Q16C
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#define EXTERNAL_FLASH_USE_QSPI
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//#define EXTERNAL_FLASH_DEVICES GD25Q16C
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//#define EXTERNAL_FLASH_USE_QSPI
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#ifdef __cplusplus
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}
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