sforkowany z mirror/meshtastic-firmware
62 wiersze
2.4 KiB
INI
62 wiersze
2.4 KiB
INI
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# Example OpenOCD configuration file for ESP-WROOM-32 module.
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# By default, the following configuration is used:
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# - dual core debugging
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# - support for listing FreeRTOS tasks is enabled
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# - OpenOCD is configured to set SPI flash voltage at 3.3V
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# by keeping MTDI bootstrapping pin low
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#
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# Use variables listed below to customize this.
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# Variables can be modified in this file or set on the command line.
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#
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# For example, OpenOCD can be started for single core ESP32 debugging on
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# ESP-WROVER-KIT with ESP-WROOM-32 module as follows:
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#
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# openocd -f interface/ftdi/esp32_devkitj_v1.cfg -c 'set ESP32_ONLYCPU 1' -f board/esp-wroom-32.cfg
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#
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# If a different JTAG interface is used, change the first -f option.
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#
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# If OpenOCD is built from source, pass an additional -s option to specify
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# the location of 'tcl' directory:
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#
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# src/openocd -s tcl <rest of the command line>
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#
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# Note:
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# For ESP32-WROVER module use 'esp32-wrover.cfg' configuration file
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# ESP-WROOM-32 and ESP32-WROVER have different flash voltage setting
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# The ESP32 only supports JTAG.
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transport select jtag
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# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
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# do not relate to OpenOCD trying to read from a memory range without physical
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# memory being present there), you can try lowering this.
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#
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# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
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# if CPU frequency is 160MHz or 240MHz.
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adapter_khz 20000
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# If single core debugging is required, uncomment the following line
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# set ESP32_ONLYCPU 1
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# To disable RTOS support, uncomment the following line
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# set ESP32_RTOS none
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# Tell OpenOCD which SPI flash voltage is used by the board (3.3 or 1.8)
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# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
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# chip runs at. When a hard reset happens (e.g. because someone switches the board off
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# and on) the ESP32 will use the current TDI value as the bootstrap value because the
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# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
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# bootstrapping. These lines basically set the idle value of the TDI line to a
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# specified value, therefore reducing the chance of a bad bootup due to a bad flash
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# voltage greatly.
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# This option defaults to 3.3, if not set. To override the default, uncomment
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# the following line:
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# set ESP32_FLASH_VOLTAGE 1.8
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# Set semihosting I/O base dir
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# set ESP_SEMIHOST_BASEDIR ""
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# Source the ESP32 configuration file
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source [find target/esp32.cfg]
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