kopia lustrzana https://github.com/threeme3/usdx
Minor changes.
guido
rodzic
2c34938ab9
commit
61ccf3482c
98
QCX-SSB.ino
98
QCX-SSB.ino
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@ -76,11 +76,7 @@ ssb_cap=1; dsp_cap=2;
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*/
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#ifdef KEYER
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// Iambic Morse Code Keyer Sketch
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// Copyright (c) 2009 Steven T. Elliott
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//
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// This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details: Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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// Source: http://openqrp.org/?p=343, Trimmed by Bill Bishop - wrb[at]wrbishop.com
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// Iambic Morse Code Keyer Sketch, Contribution by Uli, DL2DBG. Copyright (c) 2009 Steven T. Elliott Source: http://openqrp.org/?p=343, Trimmed by Bill Bishop - wrb[at]wrbishop.com. This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details: Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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// keyerControl bit definitions
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#define DIT_L 0x01 // Dit latch
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@ -124,7 +120,7 @@ void loadWPM (int wpm) // Calculate new time constants based on wpm value
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#include <avr/sleep.h>
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#include <avr/wdt.h>
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bool backlight = true;
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uint8_t backlight = 8;
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//FUSES = { .low = 0xFF, .high = 0xD6, .extended = 0xFD }; // Fuse settings should be these at programming.
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@ -1067,17 +1063,17 @@ public:
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if(fout > 140000000) d = 4; // for f=140..300MHz; AN619; 4.1.3, this implies integer mode
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if(d % 2) d++; // even numbers preferred for divider (AN619 p.4 and p.6)
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uint32_t fvcoa = d * fout; // Variable PLLA VCO frequency at integer multiple of fout at around 27MHz*16 = 432MHz
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// si5351 spectral purity considerations: https://groups.io/g/QRPLabs/message/42662
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ms(MSNA, fvcoa, fxtal);
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ms(MSNA, fvcoa, fxtal); // PLLA in fractional mode
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//ms(MSNB, fvcoa, fxtal);
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ms(MS0, fvcoa, fout, PLLA, 0, i, rdiv);
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ms(MS0, fvcoa, fout, PLLA, 0, i, rdiv); // Multisynth stage with integer divider but in frac mode due to phase setting
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ms(MS1, fvcoa, fout, PLLA, 0, q, rdiv);
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ms(MS2, fvcoa, fout, PLLA, 0, 0, rdiv);
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if(iqmsa != ((i-q)*((uint16_t)(fvcoa/fout))/90)){ iqmsa = (i-q)*((uint16_t)(fvcoa/fout))/90; reset(); }
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oe(0b00000011); // output enable CLK0, CLK1
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#ifdef x
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// Gangnam style phase-shift
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ms(MSNA, fvcoa, fxtal);
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ms(MSNB, fvcoa, fxtal);
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#define F_DEV 4
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@ -1086,11 +1082,10 @@ public:
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ms(MS2, fvcoa, fout, PLLA, 0, 0, rdiv);
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reset();
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ms(MS0, fvcoa, fout, PLLA, 0, 0, rdiv);
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delayMicroseconds(1000000UL/F_DEV * 5/4); // Td = 1/(4 * Fdev)
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delayMicroseconds(1000000UL/F_DEV * 5/4); // Td = 1/(4 * Fdev) phase-shift https://tj-lab.org/2020/08/27/si5351%e5%8d%98%e4%bd%93%e3%81%a73mhz%e4%bb%a5%e4%b8%8b%e3%81%ae%e7%9b%b4%e4%ba%a4%e4%bf%a1%e5%8f%b7%e3%82%92%e5%87%ba%e5%8a%9b%e3%81%99%e3%82%8b/
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ms(MS1, fvcoa, fout, PLLA, 0, 0, rdiv);
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oe(0b00000011); // output enable CLK0, CLK1
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#endif
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_fout = fout; // cache
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_div = d;
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_msa128min512 = fvcoa / fxtal * 128 - 512;
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@ -1518,7 +1513,7 @@ inline void _vox(uint8_t trigger)
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}
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//#define F_SAMP_TX 4402
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#define F_SAMP_TX 4810 //4810 // ADC sample-rate; is best a multiple of _UA and fits exactly in OCR0A = ((F_CPU / 64) / F_SAMP_TX) - 1 , should not exceed CPU utilization
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#define F_SAMP_TX 4810 //4810 // ADC sample-rate; is best a multiple of _UA and fits exactly in OCR2A = ((F_CPU / 64) / F_SAMP_TX) - 1 , should not exceed CPU utilization
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#define _UA (F_SAMP_TX) //360 // unit angle; integer representation of one full circle turn or 2pi radials or 360 degrees, should be a integer divider of F_SAMP_TX and maximized to have higest precision
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//#define MAX_DP (_UA/4) //(_UA/2) // the occupied SSB bandwidth can be further reduced by restricting the maximum phase change (set MAX_DP to _UA/2).
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//#define CARRIER_COMPLETELY_OFF_ON_LOW 1 // disable oscillator on low amplitudes, to prevent potential unwanted biasing/leakage through PA circuit
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@ -1923,7 +1918,7 @@ inline int16_t process_agc(int16_t in)
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return out;
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} */
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// M0PUB: Experimental new AGC algorithm.
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// Contribution by Alan, M0PUB: Experimental new AGC algorithm.
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// ASSUMES: Input sample values are constrained to a maximum of +/-4096 to avoid integer overflow in earlier
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// calculations.
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//
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@ -2902,8 +2897,7 @@ void timer2_stop()
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//
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// Feel free to replace it with your own custom radio implementation :-)
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char blanks[] = " ";
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#define lcd_blanks() lcd.print(blanks);
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void inline lcd_blanks(){ lcd.print(F(" ")); }
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#define N_FONTS 8
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const byte fonts[N_FONTS][8] PROGMEM = {
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@ -3357,7 +3351,7 @@ void actionCommon(uint8_t action, uint8_t *ptr, uint8_t size){
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for(n = size; n; --n) *ptr++ = eeprom_read_byte((uint8_t *)eeprom_addr++);
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break;
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case SAVE:
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for(n = size; n; --n){ eeprom_write_byte((uint8_t *)eeprom_addr++, *ptr++); wdt_reset(); }
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for(n = size; n; --n){ noInterrupts(); eeprom_write_byte((uint8_t *)eeprom_addr++, *ptr++); interrupts(); }
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break;
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case SKIP:
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eeprom_addr += size;
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@ -3512,7 +3506,7 @@ void initPins(){
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}
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#ifdef CAT
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// CAT support inspired by Charlie Morris, ZL2CTM, source: http://zl2ctm.blogspot.com/2020/06/digital-modes-transceiver.html?m=1
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// CAT support inspired by Charlie Morris, ZL2CTM, contribution by Alex, PE1EVX, source: http://zl2ctm.blogspot.com/2020/06/digital-modes-transceiver.html?m=1
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// https://www.kenwood.com/i/products/info/amateur/ts_480/pdf/ts_480_pc.pdf
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#define CATCMD_SIZE 32
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char CATcmd[CATCMD_SIZE];
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@ -3715,6 +3709,7 @@ void Command_PS1()
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void fatal(const __FlashStringHelper* msg, int value = 0, char unit = '\0') {
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lcd.setCursor(0, 1);
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lcd.print('!'); lcd.print('!');
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lcd.print(msg);
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if(unit != '\0') {
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lcd.print('=');
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@ -3750,12 +3745,12 @@ void setup()
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TIMER2_COMPA_vect();
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//func_ptr();
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t1 = micros();
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float load_tx = (float)(t1 - t0) * (float)F_SAMP_TX * 100.0 / 1000000.0 * 16000000.0/(float)F_CPU;
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uint16_t load_tx = (float)(t1 - t0) * (float)F_SAMP_TX * 100.0 / 1000000.0 * 16000000.0/(float)F_CPU;
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// benchmark sdr_rx() ISR
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func_ptr = sdr_rx;
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rx_state = 0;
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float load_rx[8];
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float load_rx_avg = 0;
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uint16_t load_rx[8];
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uint16_t load_rx_avg = 0;
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uint16_t i;
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for(i = 0; i != 8; i++){
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rx_state = i;
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@ -3855,21 +3850,19 @@ void setup()
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}*/
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// Measure CPU loads
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if(!(load_tx <= 100.0)){
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fatal(F("!!CPU_tx"), load_tx, '%');
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if(!(load_tx <= 100)){
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fatal(F("CPU_tx"), load_tx, '%');
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}
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if(!(load_rx_avg <= 100.0)){
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fatal(F("!!CPU_rx"), load_rx_avg, '%');
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// and specify individual timings for each of the eight alternating processing functions:
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for(i = 0; i != 8; i++){
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if(!(load_rx[i] <= 100.0))
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{
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fatal(F("!!CPU_rx"), load_rx[i], '%');
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}
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if(!(load_rx_avg <= 100)){
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fatal(F("CPU_rx"), load_rx_avg, '%');
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}
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/*for(i = 0; i != 8; i++){
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if(!(load_rx[i] <= 100)){ // and specify individual timings for each of the eight alternating processing functions
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//fatal(F("CPU_rx"), load_rx[i], '%');
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lcd.setCursor(0, 1); lcd.print(F("!!CPU_rx")); lcd.print(i); lcd.print('='); lcd.print(load_rx[i]); lcd.print('%'); lcd_blanks();
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}
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}
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}*/
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// Measure VDD (+5V); should be ~5V
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si5351.SendRegister(SI_CLK_OE, 0b11111111); // Mute QSD: CLK2_EN=CLK1_EN,CLK0_EN=0
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@ -3879,13 +3872,13 @@ void setup()
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float vdd = 2.0 * (float)analogRead(AUDIO2) * 5.0 / 1024.0;
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digitalWrite(RX, HIGH);
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if(!(vdd > 4.8 && vdd < 5.2)){
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fatal(F("!!V5.0"), vdd, 'V');
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fatal(F("V5.0"), vdd, 'V');
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}
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// Measure VEE (+3.3V); should be ~3.3V
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float vee = (float)analogRead(SCL) * 5.0 / 1024.0;
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if(!(vee > 3.2 && vee < 3.8)){
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fatal(F("!!V3.3"), vee, 'V');
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fatal(F("V3.3"), vee, 'V');
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}
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// Measure AVCC via AREF and using internal 1.1V reference fed to ADC; should be ~5V
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@ -3896,7 +3889,7 @@ void setup()
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for(; bit_is_set(ADCSRA, ADSC););
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float avcc = 1.1 * 1023.0 / ADC;
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if(!(avcc > 4.6 && avcc < 5.2)){
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fatal(F("!!Vavcc"), avcc, 'V');
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fatal(F("Vavcc"), avcc, 'V');
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}
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// Report no SSB capability
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@ -3906,24 +3899,24 @@ void setup()
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// Test microphone polarity
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/*if((ssb_cap) && (!digitalRead(DAH))){
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fatal(F("!!MIC in rev.pol"));
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fatal(F("MIC in rev.pol"));
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}*/
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// Measure DVM bias; should be ~VAREF/2
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float dvm = (float)analogRead(DVM) * 5.0 / 1024.0;
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if((ssb_cap) && !(dvm > 1.8 && dvm < 3.2)){
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fatal(F("!!Vadc2"), dvm, 'V');
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fatal(F("Vadc2"), dvm, 'V');
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}
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// Measure AUDIO1, AUDIO2 bias; should be ~VAREF/2
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if(dsp_cap == SDR){
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float audio1 = (float)analogRead(AUDIO1) * 5.0 / 1024.0;
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if(!(audio1 > 1.8 && audio1 < 3.2)){
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fatal(F("!!Vadc0"), audio1, 'V');
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fatal(F("Vadc0"), audio1, 'V');
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}
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float audio2 = (float)analogRead(AUDIO2) * 5.0 / 1024.0;
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if(!(audio2 > 1.8 && audio2 < 3.2)){
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fatal(F("!!Vadc1"), audio2, 'V');
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fatal(F("Vadc1"), audio2, 'V');
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}
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}
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@ -3950,7 +3943,7 @@ void setup()
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for(int j = 3; j != 8; j++) if(si5351.RecvRegister(SI_SYNTH_PLL_A + j) != si5351.pll_regs[j]) i2c_error++;
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}
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if(i2c_error){
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fatal(F("!!BER_i2c"), i2c_error, ' ');
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fatal(F("BER_i2c"), i2c_error, ' ');
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}
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#endif
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@ -4025,6 +4018,7 @@ void setup()
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delay(1000);
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wdt_reset();
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}
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}
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uint8_t vox_tx = 0;
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@ -4467,40 +4461,37 @@ void loop()
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/* BACKLOG:
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code definitions and re-use for comb, integrator, dc decoupling, arctan
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in func_ptr for different mode types
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refactor main()
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agc based on rms256, agc/smeter after filter
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noisefree integrator (rx audio out) in lower range
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raised cosine tx amp for cw, 4ms tau seems enough: http://fermi.la.asu.edu/w9cf/articles/click/index.html
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auto paddle
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cw tx message/cw encoder
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32 bin fft
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dynamic range cw
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att extended agc
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single ATT
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configurable F_CPU
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CW-L mode
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VFO-A/B+split+RIT
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VOX integration in main loop
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undersampling, IF-offset
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K2/TS480 CAT control
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faster RX-TX switch to support CW
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clock
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qcx API demo code
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scan
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unwanted VOX feedback in DSP mode
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move last bit of arrays into flash? https://www.microchip.com/webdoc/AVRLibcReferenceManual/FAQ_1faq_rom_array.html
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remove floats
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u-law in RX path?: http://dystopiancode.blogspot.com/2012/02/pcm-law-and-u-law-companding-algorithms.html
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Arduino library?
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1. RX bias offset correction by measurement avg, 2. charge decoupling cap. by resetting to 0V and setting 5V for a certain amount of (charge) time
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AGC amplitude sense behind filter, controlling gain before filter
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add 1K (500R?) to GND at TTL RF output to keep zero-level below BS170 threshold
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additional PWM output for potential BOOST conversion
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SWR measurement?
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CW decoder amp thrshld restriction and noise reduction (use of certain pause amounts)
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squelch gating
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More buttons, context specific items on LCD
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Wider SSB passband (useful for FT8)
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Amp keying, band-data output
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more buttons
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s-meter offset vs DC bal.
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keyer with interrupt-driven timers (to reduce jitter)
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Analyse assembly:
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/home/guido/Downloads/arduino-1.8.10/hardware/tools/avr/bin/avr-g++ -S -g -Os -w -std=gnu++11 -fpermissive -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -Wno-error=narrowing -MMD -mmcu=atmega328p -DF_CPU=16000000L -DARDUINO=10810 -DARDUINO_AVR_UNO -DARDUINO_ARCH_AVR -I/home/guido/Downloads/arduino-1.8.10/hardware/arduino/avr/cores/arduino -I/home/guido/Downloads/arduino-1.8.10/hardware/arduino/avr/variants/standard /tmp/arduino_build_483134/sketch/QCX-SSB.ino.cpp -o /tmp/arduino_build_483134/sketch/QCX-SSB.ino.cpp.txt
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@ -4511,19 +4502,8 @@ Q- I+ Q+ I- Q- I+ Q+ I-
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90 deg.shift div/2@S1(pin2)
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50MHz LSB OK, USB NOK
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s-meter offset vs DC bal.
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AGC DR
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auto ATT
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class-E
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PCB
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RIT, VFO-B, undersampling, IF-offset
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keyer dash-dot
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tiny-click removal, DC offset correction
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atmega328p signature: https://forum.arduino.cc/index.php?topic=341799.15 https://www.eevblog.com/forum/microcontrollers/bootloader-on-smd-atmega328p-au/msg268938/#msg268938 https://www.avrfreaks.net/forum/undocumented-signature-row-contents
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VOX running with F_ADC_CONV/2 or F_SAMP_PWM/2 (to remove geiger)
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keyer with interrupt-driven timers (to reduce jitter)
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*/
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Ładowanie…
Reference in New Issue