kopia lustrzana https://github.com/mobilinkd/tnc3-firmware
Add ARM Q15 filter library.
Rob Riggs
rodzic
109850607d
commit
2ebcc19249
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@ -0,0 +1,345 @@
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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*
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* $Date: 19. March 2015
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* $Revision: V.1.4.5
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*
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* Project: CMSIS DSP Library
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* Title: arm_fir_fast_q15.c
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*
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* Description: Q15 Fast FIR filter processing function.
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*
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* Target Processor: Cortex-M4/Cortex-M3
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of ARM LIMITED nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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/**
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* @ingroup groupFilters
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*/
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/**
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* @addtogroup FIR
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* @{
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*/
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/**
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* @param[in] *S points to an instance of the Q15 FIR filter structure.
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* @param[in] *pSrc points to the block of input data.
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* @param[out] *pDst points to the block of output data.
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* @param[in] blockSize number of samples to process per call.
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* @return none.
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*
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* <b>Scaling and Overflow Behavior:</b>
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* \par
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* This fast version uses a 32-bit accumulator with 2.30 format.
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* The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
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* Thus, if the accumulator result overflows it wraps around and distorts the result.
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* In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
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* The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
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*
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* \par
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* Refer to the function <code>arm_fir_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
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* Use the function <code>arm_fir_init_q15()</code> to initialize the filter structure.
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*/
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void arm_fir_fast_q15(
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const arm_fir_instance_q15 * S,
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q15_t * pSrc,
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q15_t * pDst,
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uint32_t blockSize)
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{
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q15_t *pState = S->pState; /* State pointer */
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q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
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q15_t *pStateCurnt; /* Points to the current sample of the state */
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q31_t acc0, acc1, acc2, acc3; /* Accumulators */
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q15_t *pb; /* Temporary pointer for coefficient buffer */
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q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */
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q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */
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uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
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uint32_t tapCnt, blkCnt; /* Loop counters */
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/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
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/* pStateCurnt points to the location where the new input data should be written */
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pStateCurnt = &(S->pState[(numTaps - 1u)]);
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/* Apply loop unrolling and compute 4 output values simultaneously.
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* The variables acc0 ... acc3 hold output values that are being computed:
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*
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* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
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* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
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* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
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* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
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*/
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blkCnt = blockSize >> 2;
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/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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** a second loop below computes the remaining 1 to 3 samples. */
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while(blkCnt > 0u)
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{
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/* Copy four new input samples into the state buffer.
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** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
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*pStateCurnt++ = *pSrc++;
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*pStateCurnt++ = *pSrc++;
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*pStateCurnt++ = *pSrc++;
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*pStateCurnt++ = *pSrc++;
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/* Set all accumulators to zero */
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acc0 = 0;
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acc1 = 0;
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acc2 = 0;
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acc3 = 0;
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/* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
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px = pState;
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/* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
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pb = pCoeffs;
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/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
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x0 = *__SIMD32(px)++;
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/* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
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x2 = *__SIMD32(px)++;
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/* Loop over the number of taps. Unroll by a factor of 4.
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** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
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tapCnt = numTaps >> 2;
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while(tapCnt > 0)
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{
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/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
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c0 = *__SIMD32(pb)++;
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/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
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acc0 = __SMLAD(x0, c0, acc0);
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/* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
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acc2 = __SMLAD(x2, c0, acc2);
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/* pack x[n-N-1] and x[n-N-2] */
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#ifndef ARM_MATH_BIG_ENDIAN
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x1 = __PKHBT(x2, x0, 0);
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#else
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x1 = __PKHBT(x0, x2, 0);
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#endif
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/* Read state x[n-N-4], x[n-N-5] */
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x0 = _SIMD32_OFFSET(px);
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/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
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acc1 = __SMLADX(x1, c0, acc1);
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/* pack x[n-N-3] and x[n-N-4] */
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#ifndef ARM_MATH_BIG_ENDIAN
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x1 = __PKHBT(x0, x2, 0);
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#else
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x1 = __PKHBT(x2, x0, 0);
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#endif
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/* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
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acc3 = __SMLADX(x1, c0, acc3);
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/* Read coefficients b[N-2], b[N-3] */
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c0 = *__SIMD32(pb)++;
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/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
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acc0 = __SMLAD(x2, c0, acc0);
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/* Read state x[n-N-6], x[n-N-7] with offset */
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x2 = _SIMD32_OFFSET(px + 2u);
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/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
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acc2 = __SMLAD(x0, c0, acc2);
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/* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
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acc1 = __SMLADX(x1, c0, acc1);
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/* pack x[n-N-5] and x[n-N-6] */
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#ifndef ARM_MATH_BIG_ENDIAN
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x1 = __PKHBT(x2, x0, 0);
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#else
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x1 = __PKHBT(x0, x2, 0);
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#endif
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/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
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acc3 = __SMLADX(x1, c0, acc3);
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/* Update state pointer for next state reading */
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px += 4u;
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/* Decrement tap count */
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tapCnt--;
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}
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/* If the filter length is not a multiple of 4, compute the remaining filter taps.
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** This is always be 2 taps since the filter length is even. */
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if((numTaps & 0x3u) != 0u)
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{
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/* Read last two coefficients */
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c0 = *__SIMD32(pb)++;
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/* Perform the multiply-accumulates */
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acc0 = __SMLAD(x0, c0, acc0);
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acc2 = __SMLAD(x2, c0, acc2);
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/* pack state variables */
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#ifndef ARM_MATH_BIG_ENDIAN
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x1 = __PKHBT(x2, x0, 0);
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#else
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x1 = __PKHBT(x0, x2, 0);
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#endif
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/* Read last state variables */
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x0 = *__SIMD32(px);
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/* Perform the multiply-accumulates */
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acc1 = __SMLADX(x1, c0, acc1);
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/* pack state variables */
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#ifndef ARM_MATH_BIG_ENDIAN
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x1 = __PKHBT(x0, x2, 0);
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#else
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x1 = __PKHBT(x2, x0, 0);
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#endif
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/* Perform the multiply-accumulates */
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acc3 = __SMLADX(x1, c0, acc3);
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}
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/* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
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** Then store the 4 outputs in the destination buffer. */
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#ifndef ARM_MATH_BIG_ENDIAN
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*__SIMD32(pDst)++ =
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__PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
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*__SIMD32(pDst)++ =
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__PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
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#else
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*__SIMD32(pDst)++ =
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__PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
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*__SIMD32(pDst)++ =
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__PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
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#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
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/* Advance the state pointer by 4 to process the next group of 4 samples */
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pState = pState + 4u;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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** No loop unrolling is used. */
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blkCnt = blockSize % 0x4u;
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while(blkCnt > 0u)
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{
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/* Copy two samples into state buffer */
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*pStateCurnt++ = *pSrc++;
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/* Set the accumulator to zero */
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acc0 = 0;
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/* Use SIMD to hold states and coefficients */
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px = pState;
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pb = pCoeffs;
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tapCnt = numTaps >> 1u;
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do
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{
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acc0 += (q31_t) * px++ * *pb++;
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acc0 += (q31_t) * px++ * *pb++;
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tapCnt--;
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}
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while(tapCnt > 0u);
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/* The result is in 2.30 format. Convert to 1.15 with saturation.
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** Then store the output in the destination buffer. */
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*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
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/* Advance state pointer by 1 for the next sample */
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pState = pState + 1u;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* Processing is complete.
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** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
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** This prepares the state buffer for the next function call. */
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/* Points to the start of the state buffer */
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pStateCurnt = S->pState;
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/* Calculation of count for copying integer writes */
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tapCnt = (numTaps - 1u) >> 2;
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while(tapCnt > 0u)
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{
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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tapCnt--;
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}
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/* Calculation of count for remaining q15_t data */
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tapCnt = (numTaps - 1u) % 0x4u;
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/* copy remaining data */
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while(tapCnt > 0u)
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{
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*pStateCurnt++ = *pState++;
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/* Decrement the loop counter */
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tapCnt--;
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}
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}
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/**
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* @} end of FIR group
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*/
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@ -0,0 +1,154 @@
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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*
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* $Date: 19. March 2015
|
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* $Revision: V.1.4.5
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*
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* Project: CMSIS DSP Library
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* Title: arm_fir_init_q15.c
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*
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* Description: Q15 FIR filter initialization function.
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*
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ------------------------------------------------------------------- */
|
||||
|
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#include "arm_math.h"
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|
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/**
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* @ingroup groupFilters
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*/
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/**
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* @addtogroup FIR
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* @{
|
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*/
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|
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/**
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* @param[in,out] *S points to an instance of the Q15 FIR filter structure.
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* @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
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* @param[in] *pCoeffs points to the filter coefficients buffer.
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* @param[in] *pState points to the state buffer.
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* @param[in] blockSize is number of samples processed per call.
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* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
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* <code>numTaps</code> is not greater than or equal to 4 and even.
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*
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* <b>Description:</b>
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* \par
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* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
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* <pre>
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* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
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* </pre>
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* Note that <code>numTaps</code> must be even and greater than or equal to 4.
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* To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
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* For example, to implement a filter with <code>numTaps=3</code> and coefficients
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* <pre>
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* {0.3, -0.8, 0.3}
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* </pre>
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* set <code>numTaps=4</code> and use the coefficients:
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* <pre>
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* {0.3, -0.8, 0.3, 0}.
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* </pre>
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* Similarly, to implement a two point filter
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* <pre>
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* {0.3, -0.3}
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* </pre>
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* set <code>numTaps=4</code> and use the coefficients:
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* <pre>
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* {0.3, -0.3, 0, 0}.
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* </pre>
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* \par
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* <code>pState</code> points to the array of state variables.
|
||||
* <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
|
||||
*/
|
||||
|
||||
arm_status arm_fir_init_q15(
|
||||
arm_fir_instance_q15 * S,
|
||||
uint16_t numTaps,
|
||||
q15_t * pCoeffs,
|
||||
q15_t * pState,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
arm_status status;
|
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/* The Number of filter coefficients in the filter must be even and at least 4 */
|
||||
if(numTaps & 0x1u)
|
||||
{
|
||||
status = ARM_MATH_ARGUMENT_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Assign filter taps */
|
||||
S->numTaps = numTaps;
|
||||
|
||||
/* Assign coefficient pointer */
|
||||
S->pCoeffs = pCoeffs;
|
||||
|
||||
/* Clear the state buffer. The size is always (blockSize + numTaps ) */
|
||||
memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
|
||||
|
||||
/* Assign state pointer */
|
||||
S->pState = pState;
|
||||
|
||||
status = ARM_MATH_SUCCESS;
|
||||
}
|
||||
|
||||
return (status);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Assign filter taps */
|
||||
S->numTaps = numTaps;
|
||||
|
||||
/* Assign coefficient pointer */
|
||||
S->pCoeffs = pCoeffs;
|
||||
|
||||
/* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
|
||||
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
|
||||
|
||||
/* Assign state pointer */
|
||||
S->pState = pState;
|
||||
|
||||
status = ARM_MATH_SUCCESS;
|
||||
|
||||
return (status);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of FIR group
|
||||
*/
|
||||
|
|
@ -0,0 +1,136 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015
|
||||
* $Revision: V.1.4.5
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_offset_q15.c
|
||||
*
|
||||
* Description: Q15 vector offset.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup offset
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
|
||||
*/
|
||||
|
||||
void arm_offset_q15(
|
||||
q15_t * pSrc,
|
||||
q15_t offset,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t offset_packed; /* Offset packed to 32 bit */
|
||||
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* Offset is packed to 32 bit in order to use SIMD32 for addition */
|
||||
offset_packed = __PKHBT(offset, offset, 16);
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A + offset */
|
||||
/* Add offset and then store the results in the destination buffer, 2 samples at a time. */
|
||||
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
|
||||
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A + offset */
|
||||
/* Add offset and then store the results in the destination buffer. */
|
||||
*pDst++ = (q15_t) __QADD16(*pSrc++, offset);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A + offset */
|
||||
/* Add offset and then store the results in the destination buffer. */
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of offset group
|
||||
*/
|
||||
|
|
@ -0,0 +1,134 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015
|
||||
* $Revision: V.1.4.5
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_q15_to_float.c
|
||||
*
|
||||
* Description: Converts the elements of the Q15 vector to floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupSupport
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup q15_to_x Convert 16-bit Integer value
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup q15_to_x
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q15 vector to floating-point vector.
|
||||
* @param[in] *pSrc points to the Q15 input vector
|
||||
* @param[out] *pDst points to the floating-point output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @return none.
|
||||
*
|
||||
* \par Description:
|
||||
*
|
||||
* The equation used for the conversion process is:
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = (float32_t) pSrc[n] / 32768; 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_q15_to_float(
|
||||
q15_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
q15_t *pIn = pSrc; /* Src pointer */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (float32_t) A / 32768 */
|
||||
/* convert from q15 to float and then store the results in the destination buffer */
|
||||
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
|
||||
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
|
||||
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
|
||||
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (float32_t) A / 32768 */
|
||||
/* convert from q15 to float and then store the results in the destination buffer */
|
||||
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of q15_to_x group
|
||||
*/
|
||||
Ładowanie…
Reference in New Issue