kopia lustrzana https://github.com/stlink-org/stlink
355 wiersze
15 KiB
C
355 wiersze
15 KiB
C
/**
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******************************************************************************
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* @file stm32l1xx_flash.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 31-December-2010
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* @brief This file contains all the functions prototypes for the FLASH
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* firmware library.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L1xx_FLASH_H
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#define __STM32L1xx_FLASH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx.h"
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/** @addtogroup STM32L1xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup FLASH
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief FLASH Status
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*/
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typedef enum
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{
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FLASH_BUSY = 1,
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FLASH_ERROR_WRP,
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FLASH_ERROR_PROGRAM,
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FLASH_COMPLETE,
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FLASH_TIMEOUT
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}FLASH_Status;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASH_Exported_Constants
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* @{
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*/
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/** @defgroup FLASH_Latency
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* @{
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*/
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#define FLASH_Latency_0 ((uint8_t)0x00) /*!< FLASH Zero Latency cycle */
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#define FLASH_Latency_1 ((uint8_t)0x01) /*!< FLASH One Latency cycle */
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#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
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((LATENCY) == FLASH_Latency_1))
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/**
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* @}
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*/
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/** @defgroup FLASH_Interrupts
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* @{
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*/
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#define FLASH_IT_EOP FLASH_PECR_EOPIE /*!< End of programming interrupt source */
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#define FLASH_IT_ERR FLASH_PECR_ERRIE /*!< Error interrupt source */
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#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFCFFFF) == 0x00000000) && (((IT) != 0x00000000)))
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/**
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* @}
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*/
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/** @defgroup FLASH_Address
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* @{
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*/
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#define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08080FFF))
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_Write_Protection
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* @{
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*/
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#define OB_WRP_Pages0to15 ((uint32_t)0x00000001) /* Write protection of Sector0 */
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#define OB_WRP_Pages16to31 ((uint32_t)0x00000002) /* Write protection of Sector1 */
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#define OB_WRP_Pages32to47 ((uint32_t)0x00000004) /* Write protection of Sector2 */
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#define OB_WRP_Pages48to63 ((uint32_t)0x00000008) /* Write protection of Sector3 */
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#define OB_WRP_Pages64to79 ((uint32_t)0x00000010) /* Write protection of Sector4 */
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#define OB_WRP_Pages80to95 ((uint32_t)0x00000020) /* Write protection of Sector5 */
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#define OB_WRP_Pages96to111 ((uint32_t)0x00000040) /* Write protection of Sector6 */
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#define OB_WRP_Pages112to127 ((uint32_t)0x00000080) /* Write protection of Sector7 */
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#define OB_WRP_Pages128to143 ((uint32_t)0x00000100) /* Write protection of Sector8 */
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#define OB_WRP_Pages144to159 ((uint32_t)0x00000200) /* Write protection of Sector9 */
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#define OB_WRP_Pages160to175 ((uint32_t)0x00000400) /* Write protection of Sector10 */
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#define OB_WRP_Pages176to191 ((uint32_t)0x00000800) /* Write protection of Sector11 */
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#define OB_WRP_Pages192to207 ((uint32_t)0x00001000) /* Write protection of Sector12 */
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#define OB_WRP_Pages208to223 ((uint32_t)0x00002000) /* Write protection of Sector13 */
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#define OB_WRP_Pages224to239 ((uint32_t)0x00004000) /* Write protection of Sector14 */
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#define OB_WRP_Pages240to255 ((uint32_t)0x00008000) /* Write protection of Sector15 */
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#define OB_WRP_Pages256to271 ((uint32_t)0x00010000) /* Write protection of Sector16 */
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#define OB_WRP_Pages272to287 ((uint32_t)0x00020000) /* Write protection of Sector17 */
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#define OB_WRP_Pages288to303 ((uint32_t)0x00040000) /* Write protection of Sector18 */
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#define OB_WRP_Pages304to319 ((uint32_t)0x00080000) /* Write protection of Sector19 */
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#define OB_WRP_Pages320to335 ((uint32_t)0x00100000) /* Write protection of Sector20 */
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#define OB_WRP_Pages336to351 ((uint32_t)0x00200000) /* Write protection of Sector21 */
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#define OB_WRP_Pages352to367 ((uint32_t)0x00400000) /* Write protection of Sector22 */
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#define OB_WRP_Pages368to383 ((uint32_t)0x00800000) /* Write protection of Sector23 */
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#define OB_WRP_Pages384to399 ((uint32_t)0x01000000) /* Write protection of Sector24 */
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#define OB_WRP_Pages400to415 ((uint32_t)0x02000000) /* Write protection of Sector25 */
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#define OB_WRP_Pages416to431 ((uint32_t)0x04000000) /* Write protection of Sector26 */
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#define OB_WRP_Pages432to447 ((uint32_t)0x08000000) /* Write protection of Sector27 */
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#define OB_WRP_Pages448to463 ((uint32_t)0x10000000) /* Write protection of Sector28 */
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#define OB_WRP_Pages464to479 ((uint32_t)0x20000000) /* Write protection of Sector29 */
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#define OB_WRP_Pages480to495 ((uint32_t)0x40000000) /* Write protection of Sector30 */
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#define OB_WRP_Pages496to511 ((uint32_t)0x80000000) /* Write protection of Sector31 */
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#define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
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#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_Read_Protection
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* @{
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*/
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/**
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* @brief Read Protection Level
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*/
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#define OB_RDP_Level_0 ((uint8_t)0xAA)
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#define OB_RDP_Level_1 ((uint8_t)0xBB)
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/*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2
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it's no more possible to go back to level 1 or 0 */
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#define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
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((LEVEL) == OB_RDP_Level_1))/*||\
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((LEVEL) == OB_RDP_Level_2))*/
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_IWatchdog
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* @{
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*/
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#define OB_IWDG_SW ((uint8_t)0x10) /*!< Software WDG selected */
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#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */
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#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_nRST_STOP
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* @{
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*/
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#define OB_STOP_NoRST ((uint8_t)0x20) /*!< No reset generated when entering in STOP */
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#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
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#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_nRST_STDBY
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* @{
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*/
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#define OB_STDBY_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STANDBY */
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#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
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#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_BOR_Level
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* @{
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*/
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#define OB_BOR_OFF ((uint8_t)0x00) /*!< BOR is disabled at power down, the reset is asserted when the VDD
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power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
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#define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
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#define OB_BOR_LEVEL2 ((uint8_t)0x09) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
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#define OB_BOR_LEVEL3 ((uint8_t)0x0A) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
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#define OB_BOR_LEVEL4 ((uint8_t)0x0B) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
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#define OB_BOR_LEVEL5 ((uint8_t)0x0C) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
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#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_OFF) || \
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((LEVEL) == OB_BOR_LEVEL1) || \
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((LEVEL) == OB_BOR_LEVEL2) || \
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((LEVEL) == OB_BOR_LEVEL3) || \
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((LEVEL) == OB_BOR_LEVEL4) || \
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((LEVEL) == OB_BOR_LEVEL5))
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/**
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* @}
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*/
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/** @defgroup FLASH_Flags
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* @{
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*/
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#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
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#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */
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#define FLASH_FLAG_ENDHV FLASH_SR_ENHV /*!< FLASH End of High Voltage flag */
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#define FLASH_FLAG_READY FLASH_SR_READY /*!< FLASH Ready flag after low power mode */
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#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
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#define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
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#define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */
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#define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option Validity error flag */
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#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFF0FD) == 0x00000000) && ((FLAG) != 0x00000000))
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#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
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((FLAG) == FLASH_FLAG_ENDHV) || ((FLAG) == FLASH_FLAG_READY ) || \
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((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR ) || \
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((FLAG) == FLASH_FLAG_SIZERR) || ((FLAG) == FLASH_FLAG_OPTVERR))
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/**
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* @}
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*/
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/** @defgroup FLASH_Keys
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* @{
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*/
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#define FLASH_PDKEY1 ((uint32_t)0x04152637) /*!< Flash power down key1 */
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#define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFD) /*!< Flash power down key2: used with FLASH_PDKEY1
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to unlock the RUN_PD bit in FLASH_ACR */
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#define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF) /*!< Flash program erase key1 */
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#define FLASH_PEKEY2 ((uint32_t)0x02030405) /*!< Flash program erase key: used with FLASH_PEKEY2
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to unlock the write access to the FLASH_PECR register and
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data EEPROM */
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#define FLASH_PRGKEY1 ((uint32_t)0x8C9DAEBF) /*!< Flash program memory key1 */
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#define FLASH_PRGKEY2 ((uint32_t)0x13141516) /*!< Flash program memory key2: used with FLASH_PRGKEY2
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to unlock the program memory */
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#define FLASH_OPTKEY1 ((uint32_t)0xFBEAD9C8) /*!< Flash option key1 */
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#define FLASH_OPTKEY2 ((uint32_t)0x24252627) /*!< Flash option key2: used with FLASH_OPTKEY1 to
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unlock the write access to the option byte block */
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/**
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* @}
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*/
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/** @defgroup Timeout_definition
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* @{
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*/
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#define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x8000)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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/**
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* @brief FLASH memory functions that can be executed from FLASH.
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*/
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/* FLASH Interface configuration functions ************************************/
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void FLASH_SetLatency(uint32_t FLASH_Latency);
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void FLASH_PrefetchBufferCmd(FunctionalState NewState);
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void FLASH_ReadAccess64Cmd(FunctionalState NewState);
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void FLASH_SLEEPPowerDownCmd(FunctionalState NewState);
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/* FLASH Memory Programming functions *****************************************/
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void FLASH_Unlock(void);
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void FLASH_Lock(void);
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FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
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FLASH_Status FLASH_FastProgramWord(uint32_t Address, uint32_t Data);
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/* DATA EEPROM Programming functions ******************************************/
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void DATA_EEPROM_Unlock(void);
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void DATA_EEPROM_Lock(void);
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void DATA_EEPROM_FixedTimeProgramCmd(FunctionalState NewState);
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FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address);
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FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data);
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FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data);
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FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data);
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FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data);
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FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data);
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FLASH_Status DATA_EEPROM_ProgramWord(uint32_t Address, uint32_t Data);
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/* Option Bytes Programming functions *****************************************/
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void FLASH_OB_Unlock(void);
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void FLASH_OB_Lock(void);
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void FLASH_OB_Launch(void);
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FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
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FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP);
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FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
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FLASH_Status FLASH_OB_BORConfig(uint8_t OB_BOR);
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uint8_t FLASH_OB_GetUser(void);
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uint32_t FLASH_OB_GetWRP(void);
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FlagStatus FLASH_OB_GetRDP(void);
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uint8_t FLASH_OB_GetBOR(void);
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/* Interrupts and flags management functions **********************************/
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void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
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FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
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void FLASH_ClearFlag(uint32_t FLASH_FLAG);
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FLASH_Status FLASH_GetStatus(void);
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FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
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/**
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* @brief FLASH memory functions that should be executed from internal SRAM.
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* These functions are defined inside the "stm32l1xx_flash_ramfunc.c"
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* file.
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*/
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FLASH_Status FLASH_RUNPowerDownCmd(FunctionalState NewState);
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FLASH_Status FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer);
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FLASH_Status DATA_EEPROM_EraseDoubleWord(uint32_t Address);
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FLASH_Status DATA_EEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32L1xx_FLASH_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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