Add STM32WLEx support

config/chips/WLE.chip

@@ -0,0 +1,13 @@
+# Chip-ID file for WLE
+#
+chip_id 0x497
+description WLE
+flash_type 9
+flash_pagesize 0x800
+sram_size 0x10000
+bootrom_base 0x1fff0000
+bootrom_size 0x7000
+option_base 0x0
+option_size 0x0
+flags swo
+

src/stlink-lib/chipid.c

@@ -847,6 +847,18 @@ static struct stlink_chipid_params devices[] = {
         .bootrom_size = 0x7000,
         .flags = CHIP_F_HAS_SWO_TRACING,
     },
+    {
+        // STM32WLEx
+        .chip_id = STLINK_CHIPID_STM32_WLE,
+        .description = "WLEx",
+        .flash_type = STLINK_FLASH_TYPE_WB,
+        .flash_size_reg = 0x1FFF75E0,
+        .flash_pagesize = 0x800, // 2k
+        .sram_size = 0x10000,
+        .bootrom_base = 0x1fff0000, // see the memory map
+        .bootrom_size = 0x7000,
+        .flags = CHIP_F_HAS_SWO_TRACING,
+    },
     {
         // STM32H742/743/753 (from RM0433)
         .chip_id = STLINK_CHIPID_STM32_H74xxx,

src/stlink-lib/chipid.h

@@ -70,7 +70,8 @@ enum stlink_stm32_chipids {
     STLINK_CHIPID_STM32_G4_CAT4          = 0x479,
     STLINK_CHIPID_STM32_H7Ax             = 0x480, /* RM0455, p.2863 */
     STLINK_CHIPID_STM32_H72x             = 0x483, /* RM0468, p.3199 */
-    STLINK_CHIPID_STM32_WB55             = 0x495
+    STLINK_CHIPID_STM32_WB55             = 0x495,
+    STLINK_CHIPID_STM32_WLE              = 0x497
 };
 
 #define CHIP_F_HAS_DUAL_BANK    (1 << 0)