kopia lustrzana https://github.com/stlink-org/stlink
Fixed a bug that caused gdb to display wrong registers when using stlink ver 1.
rodzic
52b626bd16
commit
fb9d6399a7
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@ -707,9 +707,6 @@ void _stlink_sg_force_debug(stlink_t *sl) {
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void _stlink_sg_read_all_regs(stlink_t *sl, reg *regp) {
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struct stlink_libsg *sg = sl->backend_data;
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/* unused */
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regp = regp;
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clear_cdb(sg);
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sg->cdb_cmd_blk[1] = STLINK_DEBUG_READALLREGS;
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sl->q_len = 84;
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@ -722,23 +719,23 @@ void _stlink_sg_read_all_regs(stlink_t *sl, reg *regp) {
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// 0-3 | 4-7 | ... | 60-63 | 64-67 | 68-71 | 72-75 | 76-79 | 80-83
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// r0 | r1 | ... | r15 | xpsr | main_sp | process_sp | rw | rw2
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for (int i = 0; i < 16; i++) {
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sg->reg.r[i] = read_uint32(sl->q_buf, 4 * i);
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regp->r[i] = read_uint32(sl->q_buf, 4 * i);
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if (sl->verbose > 1)
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DLOG("r%2d = 0x%08x\n", i, sg->reg.r[i]);
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DLOG("r%2d = 0x%08x\n", i, regp->r[i]);
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}
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sg->reg.xpsr = read_uint32(sl->q_buf, 64);
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sg->reg.main_sp = read_uint32(sl->q_buf, 68);
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sg->reg.process_sp = read_uint32(sl->q_buf, 72);
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sg->reg.rw = read_uint32(sl->q_buf, 76);
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sg->reg.rw2 = read_uint32(sl->q_buf, 80);
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regp->xpsr = read_uint32(sl->q_buf, 64);
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regp->main_sp = read_uint32(sl->q_buf, 68);
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regp->process_sp = read_uint32(sl->q_buf, 72);
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regp->rw = read_uint32(sl->q_buf, 76);
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regp->rw2 = read_uint32(sl->q_buf, 80);
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if (sl->verbose < 2)
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return;
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DLOG("xpsr = 0x%08x\n", sg->reg.xpsr);
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DLOG("main_sp = 0x%08x\n", sg->reg.main_sp);
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DLOG("process_sp = 0x%08x\n", sg->reg.process_sp);
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DLOG("rw = 0x%08x\n", sg->reg.rw);
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DLOG("rw2 = 0x%08x\n", sg->reg.rw2);
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DLOG("xpsr = 0x%08x\n", regp->xpsr);
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DLOG("main_sp = 0x%08x\n", regp->main_sp);
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DLOG("process_sp = 0x%08x\n", regp->process_sp);
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DLOG("rw = 0x%08x\n", regp->rw);
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DLOG("rw2 = 0x%08x\n", regp->rw2);
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}
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// Read an arm-core register, the index must be in the range 0..20.
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