kopia lustrzana https://github.com/stlink-org/stlink
Add STM32L1xx Cat.2 devices support
rodzic
3181cb3d51
commit
ee62707b4a
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@ -463,6 +463,8 @@ int stlink_load_device_params(stlink_t *sl) {
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if ((sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) && ( flash_size == 0 )) {
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sl->flash_size = 128 * 1024;
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} else if (sl->chip_id == STM32_CHIPID_L1_CAT2) {
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sl->flash_size = (flash_size & 0xff) * 1024;
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} else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_HIGH) {
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// 0 is 384k and 1 is 256k
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if ( flash_size == 0 ) {
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@ -934,8 +936,9 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size)
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int error = -1;
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size_t off;
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int num_empty = 0;
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unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) ? 0:0xff;
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unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE) ? 0:0xff;
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const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700);
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if (fd == -1) {
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@ -1074,9 +1077,9 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
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#if DEBUG_FLASH
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fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
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#endif
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE
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|| sl->chip_id == STM32_CHIPID_L0) {
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE || sl->chip_id == STM32_CHIPID_L0) {
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uint32_t val;
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uint32_t flash_regs_base;
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@ -1179,9 +1182,9 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
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}
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int stlink_erase_flash_mass(stlink_t *sl) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE
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|| sl->chip_id == STM32_CHIPID_L0) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE || sl->chip_id == STM32_CHIPID_L0) {
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/* erase each page */
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int i = 0, num_pages = sl->flash_size/sl->flash_pgsz;
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for (i = 0; i < num_pages; i++) {
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@ -1374,8 +1377,9 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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const uint8_t* loader_code;
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size_t loader_size;
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) { /* stm32l */
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE) { /* stm32l */
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loader_code = loader_code_stm32l;
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loader_size = sizeof(loader_code_stm32l);
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} else if (sl->core_id == STM32VL_CORE_ID
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@ -1607,9 +1611,9 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t
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} //STM32F4END
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else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE
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|| sl->chip_id == STM32_CHIPID_L0) {
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else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE || sl->chip_id == STM32_CHIPID_L0) {
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/* use fast word write. todo: half page. */
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uint32_t val;
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uint32_t flash_regs_base;
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@ -1738,8 +1742,9 @@ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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/* write the file in flash at addr */
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int err;
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unsigned int num_empty = 0, index;
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unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE )?0:0xff;
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unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE) ? 0:0xff;
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mapped_file_t mf = MAPPED_FILE_INITIALIZER;
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if (map_file(&mf, path) == -1) {
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ELOG("map_file() == -1\n");
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@ -1779,9 +1784,9 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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return -1;
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}
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE
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|| sl->chip_id == STM32_CHIPID_L0) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE || sl->chip_id == STM32_CHIPID_L0) {
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size_t count = size / sizeof(uint32_t);
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if (size % sizeof(uint32_t)) ++count;
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@ -1843,9 +1848,9 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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}
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/* check written byte count */
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE
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|| sl->chip_id == STM32_CHIPID_L0) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
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|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
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|| sl->chip_id == STM32_CHIPID_L152_RE || sl->chip_id == STM32_CHIPID_L0) {
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size_t count = size / sizeof(uint32_t);
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if (size % sizeof(uint32_t)) ++count;
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@ -117,6 +117,7 @@ extern "C" {
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#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
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#define STM32_CHIPID_F1_VL_HIGH 0x428
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#define STM32_CHIPID_L1_CAT2 0x429
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#define STM32_CHIPID_F1_XL 0x430
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@ -264,6 +265,15 @@ extern "C" {
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.bootrom_base = 0x1ff00000,
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.bootrom_size = 0x1000
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},
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{
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.chip_id = STM32_CHIPID_L1_CAT2,
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.description = "L1 Cat.2 device",
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.flash_size_reg = 0x1ff8004c,
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.flash_pagesize = 0x100,
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.sram_size = 0x8000,
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.bootrom_base = 0x1ff00000,
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.bootrom_size = 0x1000
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},
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{
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.chip_id = STM32_CHIPID_L1_MEDIUM_PLUS,
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.description = "L1 Medium-Plus-density device",
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