kopia lustrzana https://github.com/stlink-org/stlink
Merge pull request #1439 from ciakval/feature/L4Q5CG
[feature] Added support for STM32L4Q5CGdevelop
commit
e6589dbd54
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@ -6,7 +6,7 @@ chip_id 0x471 // STM32_CHIPID_L4PX
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flash_type L4
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flash_type L4
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flash_size_reg 0x1fff75e0
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flash_size_reg 0x1fff75e0
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flash_pagesize 0x1000 // 4 KB
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flash_pagesize 0x1000 // 4 KB
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sram_size 0xa0000 // 640 KB
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sram_size 0x50000 // 320 KB
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bootrom_base 0x1fff0000
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bootrom_base 0x1fff0000
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bootrom_size 0x7000 // 28 KB
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bootrom_size 0x7000 // 28 KB
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option_base 0x1ff00000
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option_base 0x1ff00000
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@ -309,6 +309,7 @@ int32_t stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, uint
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(sl->chip_id == STM32_CHIPID_L41x_L42x) ||
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(sl->chip_id == STM32_CHIPID_L41x_L42x) ||
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(sl->chip_id == STM32_CHIPID_L43x_L44x) ||
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(sl->chip_id == STM32_CHIPID_L43x_L44x) ||
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(sl->chip_id == STM32_CHIPID_L45x_L46x) ||
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(sl->chip_id == STM32_CHIPID_L45x_L46x) ||
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(sl->chip_id == STM32_CHIPID_L4PX) ||
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(sl->chip_id == STM32_CHIPID_L4Rx) ||
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(sl->chip_id == STM32_CHIPID_L4Rx) ||
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(sl->chip_id == STM32_CHIPID_L496x_L4A6x)) {
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(sl->chip_id == STM32_CHIPID_L496x_L4A6x)) {
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loader_code = loader_code_stm32l4;
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loader_code = loader_code_stm32l4;
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