kopia lustrzana https://github.com/stlink-org/stlink
Merge pull request #1390 from Rocky04/fix_f4_sram_memory_map
Dynamic SRAM size for F4 memory mappull/1397/head^2
commit
dce9d6e820
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@ -355,7 +355,8 @@ char* make_memory_map(stlink_t *sl) {
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if (sl->chip_id == STM32_CHIPID_F4 ||
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if (sl->chip_id == STM32_CHIPID_F4 ||
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sl->chip_id == STM32_CHIPID_F446 ||
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sl->chip_id == STM32_CHIPID_F446 ||
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sl->chip_id == STM32_CHIPID_F411xx) {
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sl->chip_id == STM32_CHIPID_F411xx) {
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strcpy(map, memory_map_template_F4);
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snprintf(map, sz, memory_map_template_F4,
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sl->sram_size);
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} else if (sl->chip_id == STM32_CHIPID_F4_DE) {
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} else if (sl->chip_id == STM32_CHIPID_F4_DE) {
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strcpy(map, memory_map_template_F4_DE);
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strcpy(map, memory_map_template_F4_DE);
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} else if (sl->core_id == STM32_CORE_ID_M7F_SWD) {
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} else if (sl->core_id == STM32_CORE_ID_M7F_SWD) {
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@ -8,7 +8,7 @@ static const char* const memory_map_template_F4 =
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"<memory-map>"
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"<memory-map>"
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" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
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" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
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" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
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" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // sram
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // sram
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" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0...3
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" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0...3
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" <property name=\"blocksize\">0x4000</property>" // 16 kB
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" <property name=\"blocksize\">0x4000</property>" // 16 kB
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" </memory>"
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" </memory>"
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