Pluggable backends for libsg or libusb

Compiles, but not fully tested yet.
pull/29/head
Karl Palsson 2011-10-07 02:47:37 +00:00
rodzic 93ea941dff
commit d31396111d
9 zmienionych plików z 793 dodań i 768 usunięć

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@ -1,19 +1,20 @@
VPATH=src
SOURCES_LIB=stlink-common.c stlink-usb.c #stlink-sg.c
SOURCES_LIB=stlink-common.c stlink-usb.c stlink-sg.c
OBJS_LIB=$(SOURCES_LIB:.c=.o)
CFLAGS+=-DCONFIG_USE_LIBUSB
#CFLAGS+=-DCONFIG_USE_LIBSG
CFLAGS+=-DCONFIG_USE_LIBSG
CFLAGS+=-DDEBUG
CFLAGS+= -std=gnu99
CFLAGS+=-Wall -Wextra
LDFLAGS=-lstlink -lusb-1.0 -L.
LDFLAGS=-lstlink -lusb-1.0 -lsgutils2 -L.
LIBRARY=libstlink.a
all: $(LIBRARY) test_usb #test_sg
all: $(LIBRARY) test_usb test_sg
$(LIBRARY): $(OBJS_LIB)
@echo "objs are $(OBJS_LIB)"
@ -23,7 +24,7 @@ $(LIBRARY): $(OBJS_LIB)
test_sg: test_sg.o $(LIBRARY)
@echo "building test_sg"
$(CC) $(LDFLAGS) -o $@
$(CC) test_sg.o $(LDFLAGS) -o $@
test_usb: test_usb.o $(LIBRARY)
@echo "building test_usb"

3
build/.gitignore vendored
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@ -1,3 +0,0 @@
*.o
*.d
st-util

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@ -28,6 +28,231 @@ void DD(stlink_t *sl, char *format, ...) {
}
}
/* FPEC flash controller interface, pm0063 manual
*/
#define FLASH_REGS_ADDR 0x40022000
#define FLASH_REGS_SIZE 0x28
#define FLASH_ACR (FLASH_REGS_ADDR + 0x00)
#define FLASH_KEYR (FLASH_REGS_ADDR + 0x04)
#define FLASH_SR (FLASH_REGS_ADDR + 0x0c)
#define FLASH_CR (FLASH_REGS_ADDR + 0x10)
#define FLASH_AR (FLASH_REGS_ADDR + 0x14)
#define FLASH_OBR (FLASH_REGS_ADDR + 0x1c)
#define FLASH_WRPR (FLASH_REGS_ADDR + 0x20)
#define FLASH_RDPTR_KEY 0x00a5
#define FLASH_KEY1 0x45670123
#define FLASH_KEY2 0xcdef89ab
#define FLASH_SR_BSY 0
#define FLASH_SR_EOP 5
#define FLASH_CR_PG 0
#define FLASH_CR_PER 1
#define FLASH_CR_MER 2
#define FLASH_CR_STRT 6
#define FLASH_CR_LOCK 7
void write_uint32(unsigned char* buf, uint32_t ui) {
if (!is_bigendian()) { // le -> le (don't swap)
buf[0] = ((unsigned char*) &ui)[0];
buf[1] = ((unsigned char*) &ui)[1];
buf[2] = ((unsigned char*) &ui)[2];
buf[3] = ((unsigned char*) &ui)[3];
} else {
buf[0] = ((unsigned char*) &ui)[3];
buf[1] = ((unsigned char*) &ui)[2];
buf[2] = ((unsigned char*) &ui)[1];
buf[3] = ((unsigned char*) &ui)[0];
}
}
void write_uint16(unsigned char* buf, uint16_t ui) {
if (!is_bigendian()) { // le -> le (don't swap)
buf[0] = ((unsigned char*) &ui)[0];
buf[1] = ((unsigned char*) &ui)[1];
} else {
buf[0] = ((unsigned char*) &ui)[1];
buf[1] = ((unsigned char*) &ui)[0];
}
}
uint32_t read_uint32(const unsigned char *c, const int pt) {
uint32_t ui;
char *p = (char *) &ui;
if (!is_bigendian()) { // le -> le (don't swap)
p[0] = c[pt];
p[1] = c[pt + 1];
p[2] = c[pt + 2];
p[3] = c[pt + 3];
} else {
p[0] = c[pt + 3];
p[1] = c[pt + 2];
p[2] = c[pt + 1];
p[3] = c[pt];
}
return ui;
}
static uint32_t __attribute__((unused)) read_flash_rdp(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_WRPR, sizeof (uint32_t));
return (*(uint32_t*) sl->q_buf) & 0xff;
}
static inline uint32_t read_flash_wrpr(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_WRPR, sizeof (uint32_t));
return *(uint32_t*) sl->q_buf;
}
static inline uint32_t read_flash_obr(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_OBR, sizeof (uint32_t));
return *(uint32_t*) sl->q_buf;
}
static inline uint32_t read_flash_cr(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_CR, sizeof (uint32_t));
return *(uint32_t*) sl->q_buf;
}
static inline unsigned int is_flash_locked(stlink_t *sl) {
/* return non zero for true */
return read_flash_cr(sl) & (1 << FLASH_CR_LOCK);
}
static void unlock_flash(stlink_t *sl) {
/* the unlock sequence consists of 2 write cycles where
2 key values are written to the FLASH_KEYR register.
an invalid sequence results in a definitive lock of
the FPEC block until next reset.
*/
write_uint32(sl->q_buf, FLASH_KEY1);
stlink_write_mem32(sl, FLASH_KEYR, sizeof (uint32_t));
write_uint32(sl->q_buf, FLASH_KEY2);
stlink_write_mem32(sl, FLASH_KEYR, sizeof (uint32_t));
}
static int unlock_flash_if(stlink_t *sl) {
/* unlock flash if already locked */
if (is_flash_locked(sl)) {
unlock_flash(sl);
if (is_flash_locked(sl))
return -1;
}
return 0;
}
static void lock_flash(stlink_t *sl) {
/* write to 1 only. reset by hw at unlock sequence */
const uint32_t n = read_flash_cr(sl) | (1 << FLASH_CR_LOCK);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void set_flash_cr_pg(stlink_t *sl) {
const uint32_t n = 1 << FLASH_CR_PG;
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void __attribute__((unused)) clear_flash_cr_pg(stlink_t *sl) {
const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_PG);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void set_flash_cr_per(stlink_t *sl) {
const uint32_t n = 1 << FLASH_CR_PER;
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void __attribute__((unused)) clear_flash_cr_per(stlink_t *sl) {
const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_PER);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void set_flash_cr_mer(stlink_t *sl) {
const uint32_t n = 1 << FLASH_CR_MER;
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void __attribute__((unused)) clear_flash_cr_mer(stlink_t *sl) {
const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_MER);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static void set_flash_cr_strt(stlink_t *sl) {
/* assume come on the flash_cr_per path */
const uint32_t n = (1 << FLASH_CR_PER) | (1 << FLASH_CR_STRT);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t));
}
static inline uint32_t read_flash_acr(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_ACR, sizeof (uint32_t));
return *(uint32_t*) sl->q_buf;
}
static inline uint32_t read_flash_sr(stlink_t *sl) {
stlink_read_mem32(sl, FLASH_SR, sizeof (uint32_t));
return *(uint32_t*) sl->q_buf;
}
static inline unsigned int is_flash_busy(stlink_t *sl) {
return read_flash_sr(sl) & (1 << FLASH_SR_BSY);
}
static void wait_flash_busy(stlink_t *sl) {
/* todo: add some delays here */
while (is_flash_busy(sl))
;
}
static inline unsigned int is_flash_eop(stlink_t *sl) {
return read_flash_sr(sl) & (1 << FLASH_SR_EOP);
}
static void __attribute__((unused)) clear_flash_sr_eop(stlink_t *sl) {
const uint32_t n = read_flash_sr(sl) & ~(1 << FLASH_SR_EOP);
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_SR, sizeof (uint32_t));
}
static void __attribute__((unused)) wait_flash_eop(stlink_t *sl) {
/* todo: add some delays here */
while (is_flash_eop(sl) == 0)
;
}
static inline void write_flash_ar(stlink_t *sl, uint32_t n) {
write_uint32(sl->q_buf, n);
stlink_write_mem32(sl, FLASH_AR, sizeof (uint32_t));
}
#if 0 /* todo */
static void disable_flash_read_protection(stlink_t *sl) {
/* erase the option byte area */
/* rdp = 0x00a5; */
/* reset */
}
#endif /* todo */
// Delegates to the backends...
void stlink_close(stlink_t *sl) {
@ -48,7 +273,7 @@ void stlink_enter_swd_mode(stlink_t *sl) {
}
void stlink_exit_dfu_mode(stlink_t *sl) {
D(sl, "\n*** stlink_exit_duf_mode ***\n");
D(sl, "\n*** stlink_exit_dfu_mode ***\n");
sl->backend->exit_dfu_mode(sl);
}
@ -65,16 +290,14 @@ void stlink_reset(stlink_t *sl) {
}
void stlink_run(stlink_t *sl) {
D(sl, "\n*** stlink_core_id ***\n");
D(sl, "\n*** stlink_run ***\n");
sl->backend->run(sl);
DD(sl, "core_id = 0x%08x\n", sl->core_id);
}
void stlink_status(stlink_t *sl) {
D(sl, "\n*** stlink_core_id ***\n");
D(sl, "\n*** stlink_status ***\n");
sl->backend->status(sl);
stlink_core_stat(sl);
DD(sl, "core_id = 0x%08x\n", sl->core_id);
}
void stlink_version(stlink_t *sl) {
@ -91,12 +314,58 @@ void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
sl->backend->write_mem32(sl, addr, len);
}
void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
D(sl, "\n*** stlink_read_mem32 ***\n");
if (len % 4 != 0) { // !!! never ever: fw gives just wrong values
fprintf(stderr, "Error: Data length doesn't have a 32 bit alignment: +%d byte.\n",
len % 4);
return;
}
sl->backend->read_mem32(sl, addr, len);
}
void stlink_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len) {
D(sl, "\n*** stlink_write_mem8 ***\n");
sl->backend->write_mem8(sl, addr, len);
}
void stlink_read_all_reg(stlink_t *sl) {
D(sl, "\n*** stlink_read_all_reg ***\n");
sl->backend->read_all_reg(sl);
}
void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx) {
D(sl, "\n*** stlink_write_reg\n");
sl->backend->write_reg(sl, reg, idx);
}
void stlink_read_reg(stlink_t *sl, int r_idx, reg *regp) {
D(sl, "\n*** stlink_read_reg\n");
DD(sl, " (%d) ***\n", r_idx);
if (r_idx > 20 || r_idx < 0) {
fprintf(stderr, "Error: register index must be in [0..20]\n");
return;
}
sl->backend->read_reg(sl, r_idx, regp);
}
unsigned int is_core_halted(stlink_t *sl) {
/* return non zero if core is halted */
stlink_status(sl);
return sl->q_buf[0] == STLINK_CORE_HALTED;
}
void stlink_step(stlink_t *sl) {
D(sl, "\n*** stlink_step ***\n");
sl->backend->step(sl);
}
int stlink_current_mode(stlink_t *sl) {
D(sl, "\n*** stlink_current_mode ***\n");
sl->backend->current_mode(sl);
}
@ -127,6 +396,17 @@ uint16_t read_uint16(const unsigned char *c, const int pt) {
return ui;
}
// same as above with entrypoint.
void stlink_run_at(stlink_t *sl, stm32_addr_t addr) {
stlink_write_reg(sl, addr, 15); /* pc register */
stlink_run(sl);
while (is_core_halted(sl) == 0)
usleep(3000000);
}
void stlink_core_stat(stlink_t *sl) {
if (sl->q_len <= 0)
return;
@ -148,7 +428,7 @@ void stlink_core_stat(stlink_t *sl) {
}
}
void stlink_print_data(stlink_t *sl) {
void stlink_print_data(stlink_t * sl) {
if (sl->q_len <= 0 || sl->verbose < 2)
return;
if (sl->verbose > 2)
@ -209,14 +489,13 @@ on_error:
return error;
}
static void unmap_file(mapped_file_t* mf) {
static void unmap_file(mapped_file_t * mf) {
munmap((void*) mf->base, mf->len);
mf->base = (unsigned char*) MAP_FAILED;
mf->len = 0;
}
static int check_file
(stlink_t* sl, mapped_file_t* mf, stm32_addr_t addr) {
static int check_file(stlink_t* sl, mapped_file_t* mf, stm32_addr_t addr) {
size_t off;
for (off = 0; off < mf->len; off += sl->flash_pgsz) {
@ -337,15 +616,301 @@ on_error:
return error;
}
typedef struct flash_loader {
stm32_addr_t loader_addr; /* loader sram adddr */
stm32_addr_t buf_addr; /* buffer sram address */
} flash_loader_t;
int write_buffer_to_sram
(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, size_t size) {
int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, size_t size) {
/* write the buffer right after the loader */
memcpy(sl->q_buf, buf, size);
stlink_write_mem8(sl, fl->buf_addr, size);
return 0;
}
int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page) {
/* page an addr in the page to erase */
/* wait for ongoing op to finish */
wait_flash_busy(sl);
/* unlock if locked */
unlock_flash_if(sl);
/* set the page erase bit */
set_flash_cr_per(sl);
/* select the page to erase */
write_flash_ar(sl, page);
/* start erase operation, reset by hw with bsy bit */
set_flash_cr_strt(sl);
/* wait for completion */
wait_flash_busy(sl);
/* relock the flash */
lock_flash(sl);
/* todo: verify the erased page */
return 0;
}
int stlink_erase_flash_mass(stlink_t *sl) {
/* wait for ongoing op to finish */
wait_flash_busy(sl);
/* unlock if locked */
unlock_flash_if(sl);
/* set the mass erase bit */
set_flash_cr_mer(sl);
/* start erase operation, reset by hw with bsy bit */
set_flash_cr_strt(sl);
/* wait for completion */
wait_flash_busy(sl);
/* relock the flash */
lock_flash(sl);
/* todo: verify the erased memory */
return 0;
}
int init_flash_loader(stlink_t *sl, flash_loader_t* fl) {
size_t size;
/* allocate the loader in sram */
if (write_loader_to_sram(sl, &fl->loader_addr, &size) == -1) {
fprintf(stderr, "write_loader_to_sram() == -1\n");
return -1;
}
/* allocate a one page buffer in sram right after loader */
fl->buf_addr = fl->loader_addr + size;
return 0;
}
int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
/* from openocd, contrib/loaders/flash/stm32.s */
static const uint8_t loader_code[] = {
0x08, 0x4c, /* ldr r4, STM32_FLASH_BASE */
0x1c, 0x44, /* add r4, r3 */
/* write_half_word: */
0x01, 0x23, /* movs r3, #0x01 */
0x23, 0x61, /* str r3, [r4, #STM32_FLASH_CR_OFFSET] */
0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
/* busy: */
0xe3, 0x68, /* ldr r3, [r4, #STM32_FLASH_SR_OFFSET] */
0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
0xfb, 0xd0, /* beq busy */
0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
0x01, 0xd1, /* bne exit */
0x01, 0x3a, /* subs r2, r2, #0x01 */
0xf0, 0xd1, /* bne write_half_word */
/* exit: */
0x00, 0xbe, /* bkpt #0x00 */
0x00, 0x20, 0x02, 0x40, /* STM32_FLASH_BASE: .word 0x40022000 */
};
memcpy(sl->q_buf, loader_code, sizeof (loader_code));
stlink_write_mem32(sl, sl->sram_base, sizeof (loader_code));
*addr = sl->sram_base;
*size = sizeof (loader_code);
/* success */
return 0;
}
int stlink_fcheck_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
/* check the contents of path are at addr */
int res;
mapped_file_t mf = MAPPED_FILE_INITIALIZER;
if (map_file(&mf, path) == -1)
return -1;
res = check_file(sl, &mf, addr);
unmap_file(&mf);
return res;
}
// The stlink_fwrite_flash should not muck with mmapped files inside itself,
// and should use this function instead. (Hell, what's the reason behind mmap
// there?!) But, as it is not actually used anywhere, nobody cares.
#define WRITE_BLOCK_SIZE 0x40
int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned len) {
size_t off;
flash_loader_t fl;
/* check addr range is inside the flash */
if (addr < sl->flash_base) {
fprintf(stderr, "addr too low\n");
return -1;
} else if ((addr + len) < addr) {
fprintf(stderr, "addr overruns\n");
return -1;
} else if ((addr + len) > (sl->flash_base + sl->flash_size)) {
fprintf(stderr, "addr too high\n");
return -1;
} else if ((addr & 1) || (len & 1)) {
fprintf(stderr, "unaligned addr or size\n");
return -1;
}
/* flash loader initialization */
if (init_flash_loader(sl, &fl) == -1) {
fprintf(stderr, "init_flash_loader() == -1\n");
return -1;
}
/* write each page. above WRITE_BLOCK_SIZE fails? */
for (off = 0; off < len; off += WRITE_BLOCK_SIZE) {
/* adjust last write size */
size_t size = WRITE_BLOCK_SIZE;
if ((off + WRITE_BLOCK_SIZE) > len)
size = len - off;
if (run_flash_loader(sl, &fl, addr + off, base + off, size) == -1) {
fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
return -1;
}
}
for (off = 0; off < len; off += sl->flash_pgsz) {
size_t aligned_size;
/* adjust last page size */
size_t cmp_size = sl->flash_pgsz;
if ((off + sl->flash_pgsz) > len)
cmp_size = len - off;
aligned_size = cmp_size;
if (aligned_size & (4 - 1))
aligned_size = (cmp_size + 4) & ~(4 - 1);
stlink_read_mem32(sl, addr + off, aligned_size);
if (memcmp(sl->q_buf, base + off, cmp_size))
return -1;
}
return 0;
}
int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
/* write the file in flash at addr */
int error = -1;
size_t off;
mapped_file_t mf = MAPPED_FILE_INITIALIZER;
flash_loader_t fl;
if (map_file(&mf, path) == -1) {
fprintf(stderr, "map_file() == -1\n");
return -1;
}
/* check addr range is inside the flash */
if (addr < sl->flash_base) {
fprintf(stderr, "addr too low\n");
goto on_error;
} else if ((addr + mf.len) < addr) {
fprintf(stderr, "addr overruns\n");
goto on_error;
} else if ((addr + mf.len) > (sl->flash_base + sl->flash_size)) {
fprintf(stderr, "addr too high\n");
goto on_error;
} else if ((addr & 1) || (mf.len & 1)) {
/* todo */
fprintf(stderr, "unaligned addr or size\n");
goto on_error;
}
/* erase each page. todo: mass erase faster? */
for (off = 0; off < mf.len; off += sl->flash_pgsz) {
/* addr must be an addr inside the page */
if (stlink_erase_flash_page(sl, addr + off) == -1) {
fprintf(stderr, "erase_flash_page(0x%zx) == -1\n", addr + off);
goto on_error;
}
}
/* flash loader initialization */
if (init_flash_loader(sl, &fl) == -1) {
fprintf(stderr, "init_flash_loader() == -1\n");
goto on_error;
}
/* write each page. above WRITE_BLOCK_SIZE fails? */
#define WRITE_BLOCK_SIZE 0x40
for (off = 0; off < mf.len; off += WRITE_BLOCK_SIZE) {
/* adjust last write size */
size_t size = WRITE_BLOCK_SIZE;
if ((off + WRITE_BLOCK_SIZE) > mf.len)
size = mf.len - off;
if (run_flash_loader(sl, &fl, addr + off, mf.base + off, size) == -1) {
fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
goto on_error;
}
}
/* check the file ha been written */
if (check_file(sl, &mf, addr) == -1) {
fprintf(stderr, "check_file() == -1\n");
goto on_error;
}
/* success */
error = 0;
on_error:
unmap_file(&mf);
return error;
}
int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
const size_t count = size / sizeof (uint16_t);
if (write_buffer_to_sram(sl, fl, buf, size) == -1) {
fprintf(stderr, "write_buffer_to_sram() == -1\n");
return -1;
}
/* setup core */
stlink_write_reg(sl, fl->buf_addr, 0); /* source */
stlink_write_reg(sl, target, 1); /* target */
stlink_write_reg(sl, count, 2); /* count (16 bits half words) */
stlink_write_reg(sl, 0, 3); /* flash bank 0 (input) */
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
/* unlock and set programming mode */
unlock_flash_if(sl);
set_flash_cr_pg(sl);
/* run loader */
stlink_run(sl);
while (is_core_halted(sl) == 0)
;
lock_flash(sl);
/* not all bytes have been written */
reg rr;
stlink_read_reg(sl, 2, &rr);
if (rr.r[2] != 0) {
fprintf(stderr, "write error, count == %u\n", rr.r[2]);
return -1;
}
return 0;
}

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@ -76,6 +76,11 @@ extern "C" {
typedef uint32_t stm32_addr_t;
typedef struct flash_loader {
stm32_addr_t loader_addr; /* loader sram adddr */
stm32_addr_t buf_addr; /* buffer sram address */
} flash_loader_t;
enum transport_type {
TRANSPORT_TYPE_ZERO = 0,
TRANSPORT_TYPE_LIBSG,
@ -84,20 +89,26 @@ extern "C" {
};
typedef struct _stlink stlink_t;
typedef struct _stlink_backend {
void (*close) (stlink_t* sl);
void (*exit_debug_mode) (stlink_t *sl);
void (*enter_swd_mode) (stlink_t *sl);
void (*enter_jtag_mode) (stlink_t *stl);
void (*exit_dfu_mode) (stlink_t *stl);
void (*core_id) (stlink_t *stl);
void (*reset) (stlink_t *stl);
void (*run) (stlink_t *stl);
void (*status) (stlink_t *stl);
void (*version) (stlink_t *stl);
void (*close) (stlink_t * sl);
void (*exit_debug_mode) (stlink_t * sl);
void (*enter_swd_mode) (stlink_t * sl);
void (*enter_jtag_mode) (stlink_t * stl);
void (*exit_dfu_mode) (stlink_t * stl);
void (*core_id) (stlink_t * stl);
void (*reset) (stlink_t * stl);
void (*run) (stlink_t * stl);
void (*status) (stlink_t * stl);
void (*version) (stlink_t * stl);
void (*read_mem32) (stlink_t *sl, uint32_t addr, uint16_t len);
void (*write_mem32) (stlink_t *sl, uint32_t addr, uint16_t len);
void (*write_mem8) (stlink_t *sl, uint32_t addr, uint16_t len);
void (*read_all_reg) (stlink_t * stl);
void (*read_reg) (stlink_t *sl, int r_idx, reg* regp);
void (*write_reg) (stlink_t *sl, uint32_t reg, int idx);
void (*step) (stlink_t * stl);
int (*current_mode) (stlink_t * stl);
} stlink_backend_t;
struct _stlink {
@ -113,8 +124,8 @@ extern "C" {
uint32_t core_id;
int core_stat;
/* medium density stm32 flash settings */
#define STM32_FLASH_BASE 0x08000000
#define STM32_FLASH_SIZE (128 * 1024)
@ -142,7 +153,7 @@ extern "C" {
void DD(stlink_t *sl, char *format, ...);
//stlink_t* stlink_quirk_open(const char *dev_name, const int verbose);
// delegated functions...
void stlink_enter_swd_mode(stlink_t *sl);
void stlink_enter_jtag_mode(stlink_t *sl);
@ -154,28 +165,38 @@ extern "C" {
void stlink_run(stlink_t *sl);
void stlink_status(stlink_t *sl);
void stlink_version(stlink_t *sl);
void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
void stlink_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len);
void stlink_read_all_regs(stlink_t *sl);
void stlink_read_reg(stlink_t *sl, int r_idx, reg *regp);
void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx);
void stlink_step(stlink_t *sl);
int stlink_current_mode(stlink_t *sl);
// unprocessed
int stlink_current_mode(stlink_t *sl);
void stlink_force_debug(stlink_t *sl);
void stlink_step(stlink_t *sl);
void stlink_read_all_regs(stlink_t *sl);
void stlink_read_reg(stlink_t *sl, int r_idx);
void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx);
void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
int stlink_erase_flash_page(stlink_t* sl, stm32_addr_t page);
int stlink_erase_flash_mass(stlink_t* sl);
int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, unsigned length);
// privates....
// privates, publics, the rest....
// TODO sort what is private, and what is not
int stlink_erase_flash_page(stlink_t* sl, stm32_addr_t page);
uint16_t read_uint16(const unsigned char *c, const int pt);
void stlink_core_stat(stlink_t *sl);
void stlink_print_data(stlink_t *sl);
unsigned int is_bigendian(void);
uint32_t read_uint32(const unsigned char *c, const int pt);
void write_uint32(unsigned char* buf, uint32_t ui);
void write_uint16(unsigned char* buf, uint16_t ui);
unsigned int is_core_halted(stlink_t *sl);
int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, size_t size);
int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size);
int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size);
int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size);
#include "stlink-sg.h"

Plik diff jest za duży Load Diff

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@ -12,6 +12,7 @@
extern "C" {
#endif
#include <libusb-1.0/libusb.h>
#include "stlink-common.h"
// device access
@ -66,6 +67,7 @@ extern "C" {
struct stlink_libsg {};
#endif
stlink_t* stlink_quirk_open(const char *dev_name, const int verbose);
#ifdef __cplusplus
}

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@ -26,48 +26,6 @@ void _stlink_usb_close(stlink_t* sl) {
}
}
static void write_uint32(unsigned char* buf, uint32_t ui) {
if (!is_bigendian()) { // le -> le (don't swap)
buf[0] = ((unsigned char*) &ui)[0];
buf[1] = ((unsigned char*) &ui)[1];
buf[2] = ((unsigned char*) &ui)[2];
buf[3] = ((unsigned char*) &ui)[3];
} else {
buf[0] = ((unsigned char*) &ui)[3];
buf[1] = ((unsigned char*) &ui)[2];
buf[2] = ((unsigned char*) &ui)[1];
buf[3] = ((unsigned char*) &ui)[0];
}
}
static void write_uint16(unsigned char* buf, uint16_t ui) {
if (!is_bigendian()) { // le -> le (don't swap)
buf[0] = ((unsigned char*) &ui)[0];
buf[1] = ((unsigned char*) &ui)[1];
} else {
buf[0] = ((unsigned char*) &ui)[1];
buf[1] = ((unsigned char*) &ui)[0];
}
}
static uint32_t read_uint32(const unsigned char *c, const int pt) {
uint32_t ui;
char *p = (char *) &ui;
if (!is_bigendian()) { // le -> le (don't swap)
p[0] = c[pt];
p[1] = c[pt + 1];
p[2] = c[pt + 2];
p[3] = c[pt + 3];
} else {
p[0] = c[pt + 3];
p[1] = c[pt + 2];
p[2] = c[pt + 1];
p[3] = c[pt];
}
return ui;
}
struct trans_ctx {
#define TRANS_FLAGS_IS_DONE (1 << 0)
@ -222,7 +180,7 @@ void _stlink_usb_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len) {
}
int stlink_current_mode(stlink_t * sl) {
int _stlink_usb_current_mode(stlink_t * sl) {
int mode = -1;
struct stlink_libusb * const slu = sl->backend_data;
@ -345,7 +303,7 @@ void _stlink_usb_reset(stlink_t * sl) {
}
void stlink_step(stlink_t* sl) {
void _stlink_usb_step(stlink_t* sl) {
struct stlink_libusb * const slu = sl->backend_data;
unsigned char* const buf = sl->q_buf;
ssize_t size;
@ -394,7 +352,7 @@ void _stlink_usb_exit_debug_mode(stlink_t *sl) {
}
}
void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
void _stlink_usb_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
struct stlink_libusb * const slu = sl->backend_data;
unsigned char* const buf = sl->q_buf;
ssize_t size;
@ -422,6 +380,21 @@ void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
stlink_print_data(sl);
}
void _stlink_usb_read_all_regs(stlink_t *sl) {
DD(sl, "oops! read_all_regs not implemented for USB!\n");
}
void _stlink_usb_read_reg(stlink_t *sl, int r_idx, reg *regp) {
DD(sl, "oops! read_reg not implemented for USB! Wanted to read reg %d\n",
r_idx);
}
void _stlink_usb_write_reg(stlink_t *sl, uint32_t reg, int idx) {
DD(sl, "oops! write_reg not implemented for USB! Wanted to write %#x to %d\n",
reg, idx);
}
stlink_backend_t _stlink_usb_backend = {
_stlink_usb_close,
@ -434,10 +407,16 @@ stlink_backend_t _stlink_usb_backend = {
_stlink_usb_run,
_stlink_usb_status,
_stlink_usb_version,
_stlink_usb_read_mem32,
_stlink_usb_write_mem32,
_stlink_usb_write_mem8
_stlink_usb_write_mem8,
_stlink_usb_read_all_regs,
_stlink_usb_read_reg,
_stlink_usb_write_reg,
_stlink_usb_step
};
stlink_t* stlink_open_usb(const char *dev_name, const int verbose) {
stlink_t* sl = NULL;
struct stlink_libusb* slu = NULL;

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@ -13,6 +13,7 @@ extern "C" {
#endif
#include <libusb-1.0/libusb.h>
#include "stlink-common.h"
#if defined(CONFIG_USE_LIBUSB)
struct stlink_libusb {

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@ -8,7 +8,6 @@
#include <stdlib.h>
#include "stlink-common.h"
#if 0
int main(int argc, char *argv[]) {
// set scpi lib debug level: 0 for no debug info, 10 for lots
const int scsi_verbose = 2;
@ -35,10 +34,10 @@ int main(int argc, char *argv[]) {
}
fputs("*** stlink access test ***\n", stderr);
DD(sl, "Using sg_lib %s : scsi_pt %s\n", sg_lib_version(),
fprintf(stderr, "Using sg_lib %s : scsi_pt %s\n", sg_lib_version(),
scsi_pt_version());
struct stlink *sl = stlink_force_open(dev_name, scsi_verbose);
stlink_t *sl = stlink_quirk_open(dev_name, scsi_verbose);
if (sl == NULL)
return EXIT_FAILURE;
@ -209,5 +208,4 @@ int main(int argc, char *argv[]) {
//fflush(stderr); fflush(stdout);
return EXIT_SUCCESS;
}
#endif
}