Merge pull request #1220 from hydroconstructor/chipid_cleanup-common-c-refactor

[refactoring] sourcefile 'common.c'
pull/1227/head
nightwalker-87 2022-02-04 19:37:25 +01:00 zatwierdzone przez GitHub
commit 924e1ec93b
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ID klucza GPG: 4AEE18F83AFDEB23
7 zmienionych plików z 25 dodań i 27 usunięć

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@ -149,11 +149,11 @@ enum stm32_chipids {
/* ============ */
/* Constant STM32 memory address */
#define STM32_SRAM_BASE ((uint32_t)0x20000000)
#define STM32_FLASH_BASE ((uint32_t)0x08000000)
#define STM32_SRAM_BASE ((uint32_t)0x20000000)
#define STM32_FLASH_BASE ((uint32_t)0x08000000)
#define STM32_F1_FLASH_BANK2_BASE ((uint32_t)0x08080000)
#define STM32_H7_FLASH_BANK2_BASE ((uint32_t)0x08100000)
#define STM32_F1_FLASH_BANK2_BASE ((uint32_t)0x08080000)
#define STM32_H7_FLASH_BANK2_BASE ((uint32_t)0x08100000)
#define STM32F0_DBGMCU_CR 0xE0042004
#define STM32F0_DBGMCU_CR_IWDG_STOP 8
@ -195,7 +195,4 @@ enum stm32_chipids {
#define STM32WB_RCC_AHB1ENR 0x58000048
#define STM32WB_RCC_DMAEN 0x00000003 // DMA2EN | DMA1EN
#define L1_WRITE_BLOCK_SIZE 0x80
#define L0_WRITE_BLOCK_SIZE 0x40
#endif // STM32_H

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@ -2,9 +2,7 @@
#define STM32FLASH_H
/* stm32f FPEC flash controller interface, pm0063 manual */
// TODO - all of this needs to be abstracted out....
// STM32F05x is identical, based on RM0091 (DM00031936, Doc ID 018940 Rev 2,
// August 2012)
// STM32F05x is identical, based on RM0091 (DM00031936, Doc ID 018940 Rev 2, August 2012)
#define FLASH_REGS_ADDR 0x40022000
#define FLASH_REGS_SIZE 0x28

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@ -5,9 +5,11 @@
#include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
#include <md5.h>
#include <string.h>
#include <md5.h>
#include <stlink.h>
#include <stm32.h>
#include "common_flash.h"
#include "calculate.h"
#include "map_file.h"
@ -123,8 +125,7 @@ int stlink_chip_id(stlink_t *sl, uint32_t *chip_id) {
// Read the CPU ID to determine where to read the core id
if (stlink_cpu_id(sl, &cpu_id) ||
cpu_id.implementer_id != STLINK_REG_CMx_CPUID_IMPL_ARM) {
ELOG("Can not connect to target. Please use \'connect under reset\' and "
"try again\n");
ELOG("Can not connect to target. Please use \'connect under reset\' and try again\n");
return -1;
}
@ -243,8 +244,8 @@ int stlink_load_device_params(stlink_t *sl) {
flash_size = flash_size & 0xffff;
if ((sl->chip_id == STM32_CHIPID_L1_MD ||
sl->chip_id == STM32_CHIPID_F1_VL_MD_LD ||
sl->chip_id == STM32_CHIPID_L1_MD_PLUS) &&
sl->chip_id == STM32_CHIPID_F1_VL_MD_LD ||
sl->chip_id == STM32_CHIPID_L1_MD_PLUS) &&
(flash_size == 0)) {
sl->flash_size = 128 * 1024;
} else if (sl->chip_id == STM32_CHIPID_L1_CAT2) {
@ -293,11 +294,9 @@ int stlink_load_device_params(stlink_t *sl) {
}
ILOG("%s: %u KiB SRAM, %u KiB flash in at least %u %s pages.\n",
params->dev_type, (unsigned)(sl->sram_size / 1024),
(unsigned)(sl->flash_size / 1024),
(sl->flash_pgsz < 1024) ? (unsigned)(sl->flash_pgsz)
: (unsigned)(sl->flash_pgsz / 1024),
(sl->flash_pgsz < 1024) ? "byte" : "KiB");
params->dev_type, (unsigned)(sl->sram_size / 1024), (unsigned)(sl->flash_size / 1024),
(sl->flash_pgsz < 1024) ? (unsigned)(sl->flash_pgsz) : (unsigned)(sl->flash_pgsz / 1024),
(sl->flash_pgsz < 1024) ? "byte" : "KiB");
return (0);
}
@ -919,6 +918,7 @@ uint8_t stlink_get_erased_pattern(stlink_t *sl) {
return (0xff);
}
}
// 322
int stlink_target_connect(stlink_t *sl, enum connect_type connect) {
if (connect == CONNECT_UNDER_RESET) {

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@ -1,11 +1,10 @@
#include <fcntl.h>
#include <sys/stat.h>
#include <md5.h>
#include <unistd.h> // for close
#include <unistd.h>
#include <stlink.h>
#include <logging.h>
#include "map_file.h"
#ifndef O_BINARY

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@ -7,6 +7,10 @@
#ifndef MAP_FILE_H
#define MAP_FILE_H
#ifndef O_BINARY
#define O_BINARY 0
#endif
#ifdef STLINK_HAVE_SYS_MMAN_H
#include <sys/mman.h>
#else

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@ -4,7 +4,7 @@
#include <stm32.h>
#include <stlink.h>
/** Chipid parametres */
/* Chipid parametres */
struct stlink_chipid_params {
char *dev_type;
char *ref_manual_id;