kopia lustrzana https://github.com/stlink-org/stlink
Merge 768a70d321 into 6ff401d4db
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3
README
3
README
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@ -76,9 +76,6 @@ If you would link your executable to 0x08000000 and then do
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(gdb) load firmware.elf
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then it would be written to the memory.
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STM32F4:
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The flash utility supports the full 1MB address space.
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The gdbserver only supports up to 64kB applications at the moment.
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FAQ
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===
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@ -21,6 +21,7 @@ static void usage(void)
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{
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puts("stlinkv1 command line: ./flash {read|write} /dev/sgX path addr <size>");
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puts("stlinkv2 command line: ./flash {read|write} path addr <size>");
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puts(" use hex format for addr and <size>");
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}
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static int get_opts(struct opts* o, int ac, char** av)
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@ -46,7 +47,7 @@ static int get_opts(struct opts* o, int ac, char** av)
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i = 1;
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}
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o->size = strtoul(av[i + 3], NULL, 10);
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o->size = strtoul(av[i + 3], NULL, 16);
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}
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else if (strcmp(av[0], "write") == 0)
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{
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@ -21,9 +21,9 @@
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#include "gdb-remote.h"
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#define FLASH_BASE 0x08000000
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//Allways update the FLASH_PAGE before each use, by calling stlink_calculate_pagesize
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#define FLASH_PAGE (sl->flash_pgsz)
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#define FLASH_PAGE_MASK (~((1 << 10) - 1))
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#define FLASH_SIZE (FLASH_PAGE * 128)
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volatile int do_exit = 0;
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void ctrl_c(int sig)
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@ -44,19 +44,19 @@ struct chip_params {
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uint32_t bootrom_base, bootrom_size;
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} const devices[] = {
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{ 0x410, "F1 Medium-density device", 0x1ffff7e0,
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0x20000, 0x400, 0x5000, 0x1ffff000, 0x800 }, // table 2, pm0063
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0x20000, 0x400, 0x5000, 0x1ffff000, 0x800 }, // table 2, pm0063
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{ 0x411, "F2 device", 0, /* No flash size register found in the docs*/
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0x100000, 0x20000, 0x20000, 0x1fff0000, 0x7800 }, // table 1, pm0059
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0x100000, 0x20000, 0x20000, 0x1fff0000, 0x7800 }, // table 1, pm0059
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{ 0x412, "F1 Low-density device", 0x1ffff7e0,
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0x8000, 0x400, 0x2800, 0x1ffff000, 0x800 }, // table 1, pm0063
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/*No flash size register? page size is variable */
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{ 0x413, "F4 device", 0x1FFF7A10,
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0x100000, 0x4000, 0x30000, 0x1fff0000, 0x7800 }, // table 1, pm0081
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0x8000, 0x400, 0x2800, 0x1ffff000, 0x800 }, // table 1, pm0063
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/*Page size is variable */
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{ 0x413, "F4 device", 0x1FFF7A10, //RM0090 error same as unique ID
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0x100000, 0x4000, 0x30000, 0x1fff0000, 0x7800 }, // table 1, pm0081
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{ 0x414, "F1 High-density device", 0x1ffff7e0,
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0x80000, 0x800, 0x10000, 0x1ffff000, 0x800 }, // table 3 pm0063
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0x80000, 0x800, 0x10000, 0x1ffff000, 0x800 }, // table 3 pm0063
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// This ignores the EEPROM! (and uses the page erase size,
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// not the sector write protection...)
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{ 0x416, "L1 Med-density device", 0x1FF8004C, // table 1, pm0062
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{ 0x416, "L1 Med-density device", 0x1FF8004C, // table 1, pm0062
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0x20000, 0x100, 0x4000, 0x1ff00000, 0x1000 },
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{ 0x418, "F1 Connectivity line device", 0x1ffff7e0,
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0x40000, 0x800, 0x10000, 0x1fffb000, 0x4800 },
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@ -64,18 +64,19 @@ struct chip_params {
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0x20000, 0x400, 0x2000, 0x1ffff000, 0x800 },
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{ 0x428, "F1 High-density value line device", 0x1ffff7e0,
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0x80000, 0x800, 0x8000, 0x1ffff000, 0x800 },
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{ 0x430, "F1 XL-density device", 0x1ffff7e0, // pm0068
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{ 0x430, "F1 XL-density device", 0x1ffff7e0, // pm0068
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0x100000, 0x800, 0x18000, 0x1fffe000, 0x1800 },
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{ 0 }
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};
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int serve(stlink_t *sl, int port);
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char* make_memory_map(const struct chip_params *params, uint32_t flash_size);
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char* make_memory_map(stlink_t *sl, const struct chip_params *params, uint32_t flash_size);
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int main(int argc, char** argv) {
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stlink_t *sl = NULL;
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int port = 0;
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int port = 0;
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uint32_t flash_size;
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const char * HelpStr = "\nUsage:\n"
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"\tst-util [Arguments]\n"
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@ -209,24 +210,29 @@ int main(int argc, char** argv) {
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}
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printf("Device connected: %s\n", params->description);
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printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes in pages of 0x%x bytes\n",
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params->sram_size, params->max_flash_size, params->flash_pagesize);
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if(sl->chip_id==STM32F4_CHIP_ID) {
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flash_size=0x100000; //todo: RM0090 error; size register same address as unique ID
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printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes with variable page size\n",
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params->sram_size, flash_size);
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}
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else {
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printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes in pages of 0x%x bytes\n",
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params->sram_size, params->max_flash_size, params->flash_pagesize);
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stlink_read_mem32(sl, params->flash_size_reg, 4);
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flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
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//flash_size_reg is in 1k blocks.
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flash_size *= 0x400;
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}
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/* Init PAGE_SIZE for fixed page size devices.
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* stlink_calculate_pagesize will then return this value for them.
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* variable pagesize devices must allways update FLASH_PAGE before use! */
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FLASH_PAGE = params->flash_pagesize;
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sl->flash_size=flash_size;
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//sl->flash_pgsz=0x4000;
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//sl->flash_size=0x100000;
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uint32_t flash_size;
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stlink_read_mem32(sl, params->flash_size_reg, 4);
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flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
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//flash_size=0x100000;
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printf("Flash size is %d KiB.\n", flash_size);
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// memory map is in 1k blocks.
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current_memory_map = make_memory_map(params, flash_size * 0x400);
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printf("Flash size is %d\n", flash_size);
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current_memory_map = make_memory_map(sl, params, flash_size);
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while(serve(sl, port) == 0);
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@ -238,6 +244,28 @@ int main(int argc, char** argv) {
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return 0;
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}
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static const char* const memory_map_template_F4 =
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"<?xml version=\"1.0\"?>"
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"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
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"<memory-map>"
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" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x30000\"/>" // sram
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" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" //Sectors 0..3
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" <property name=\"blocksize\">0x4000</property>" //16kB
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" </memory>"
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" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" //Sector 4
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" <property name=\"blocksize\">0x10000</property>" //64kB
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" </memory>"
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" <memory type=\"flash\" start=\"0x08020000\" length=\"0x70000\">" //Sectors 5..11
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" <property name=\"blocksize\">0x20000</property>" //128kB
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" </memory>"
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" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
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" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
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" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
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" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
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"</memory-map>";
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static const char* const memory_map_template =
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"<?xml version=\"1.0\"?>"
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"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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@ -254,17 +282,22 @@ static const char* const memory_map_template =
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" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x8\"/>" // option byte area
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"</memory-map>";
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char* make_memory_map(const struct chip_params *params, uint32_t flash_size) {
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char* make_memory_map(stlink_t *sl, const struct chip_params *params, uint32_t flash_size) {
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/* This will be freed in serve() */
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char* map = malloc(4096);
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map[0] = '\0';
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snprintf(map, 4096, memory_map_template,
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flash_size,
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params->sram_size,
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flash_size, params->flash_pagesize,
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params->bootrom_base, params->bootrom_size);
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if(sl->chip_id==STM32F4_CHIP_ID) {
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strcpy(map, memory_map_template_F4);
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}
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else {
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snprintf(map, 4096, memory_map_template,
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flash_size,
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params->sram_size,
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flash_size, params->flash_pagesize,
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params->bootrom_base, params->bootrom_size);
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}
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return map;
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}
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@ -491,13 +524,14 @@ struct flash_block {
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static struct flash_block* flash_root;
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static int flash_add_block(stm32_addr_t addr, unsigned length,
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stlink_t *sl) {
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if(addr < FLASH_BASE || addr + length > FLASH_BASE + FLASH_SIZE) {
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static int flash_add_block(stm32_addr_t addr, unsigned length, stlink_t *sl) {
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if(addr < FLASH_BASE || addr + length > FLASH_BASE + sl->flash_size) {
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fprintf(stderr, "flash_add_block: incorrect bounds\n");
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return -1;
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}
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stlink_calculate_pagesize(sl, addr);
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if(addr % FLASH_PAGE != 0 || length % FLASH_PAGE != 0) {
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fprintf(stderr, "flash_add_block: unaligned block\n");
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return -1;
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@ -568,18 +602,18 @@ static int flash_go(stlink_t *sl) {
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unsigned length = fb->length;
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for(stm32_addr_t page = fb->addr; page < fb->addr + fb->length; page += FLASH_PAGE) {
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//Update FLASH_PAGE
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stlink_calculate_pagesize(sl, page);
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#ifdef DEBUG
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printf("flash_do: page %08x\n", page);
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#endif
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//todo:write flash already does erase so why is this here?
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stlink_erase_flash_page(sl, page);
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if(stlink_write_flash(sl, page, fb->data + (page - fb->addr),
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length > FLASH_PAGE ? FLASH_PAGE : length) < 0)
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goto error;
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}
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}
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}
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stlink_reset(sl);
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@ -1,4 +1,4 @@
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#define DEBUG_FLASH 0
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#include <stdarg.h>
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#include <stdio.h>
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@ -148,8 +148,10 @@ static inline uint32_t read_flash_cr(stlink_t *sl) {
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stlink_read_mem32(sl, FLASH_F4_CR, sizeof (uint32_t));
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else
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stlink_read_mem32(sl, FLASH_CR, sizeof (uint32_t));
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fprintf(stdout, "CR:%X\n", *(uint32_t*) sl->q_buf);
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return *(uint32_t*) sl->q_buf;
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#if DEBUG_FLASH
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fprintf(stdout, "CR:0x%x\n", *(uint32_t*) sl->q_buf);
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#endif
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return *(uint32_t*) sl->q_buf;
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}
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static inline unsigned int is_flash_locked(stlink_t *sl) {
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@ -281,7 +283,7 @@ static inline uint32_t read_flash_sr(stlink_t *sl) {
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stlink_read_mem32(sl, FLASH_F4_SR, sizeof (uint32_t));
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else
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stlink_read_mem32(sl, FLASH_SR, sizeof (uint32_t));
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//fprintf(stdout, "SR:%X\n", *(uint32_t*) sl->q_buf);
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//fprintf(stdout, "SR:0x%x\n", *(uint32_t*) sl->q_buf);
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return *(uint32_t*) sl->q_buf;
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}
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@ -323,7 +325,9 @@ static inline void write_flash_cr_psiz(stlink_t *sl, uint32_t n) {
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uint32_t x = read_flash_cr(sl);
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x &= ~(0x03 << 8);
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x |= (n << 8);
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fprintf(stdout, "PSIZ:%X %X\n", x, n);
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#if DEBUG_FLASH
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fprintf(stdout, "PSIZ:0x%x 0x%x\n", x, n);
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#endif
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write_uint32(sl->q_buf, x);
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stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t));
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}
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@ -334,7 +338,9 @@ static inline void write_flash_cr_snb(stlink_t *sl, uint32_t n) {
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x &= ~FLASH_F4_CR_SNB_MASK;
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x |= (n << FLASH_F4_CR_SNB);
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x |= (1 << FLASH_F4_CR_SER);
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fprintf(stdout, "SNB:%X %X\n", x, n);
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#if DEBUG_FLASH
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fprintf(stdout, "SNB:0x%x 0x%x\n", x, n);
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#endif
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write_uint32(sl->q_buf, x);
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stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t));
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}
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@ -393,7 +399,7 @@ void stlink_identify_device(stlink_t *sl) {
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(sl->q_buf[3] << 24);
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/* Fix chip_id for F4 */
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if (((chip_id & 0xFFF) == 0x411) && (core_id == CORE_M4_R0)) {
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printf("Fixing wrong chip_id for STM32F4 Rev A errata\n");
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//printf("Fixing wrong chip_id for STM32F4 Rev A errata\n");
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chip_id = 0x413;
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}
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sl->chip_id=chip_id;
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@ -816,17 +822,17 @@ uint32_t calculate_F4_sectornum(uint32_t flashaddr){
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}
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uint32_t calculate_sectorsize(stlink_t *sl, uint32_t flashaddr){
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uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr){
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if(sl->chip_id == STM32F4_CHIP_ID) {
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uint32_t sector=calculate_F4_sectornum(flashaddr);
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if (sector<4) return (0x4000);
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else if(sector<5) return(0x10000);
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else return(0x20000);
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if (sector<4) sl->flash_pgsz=0x4000;
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else if(sector<5) sl->flash_pgsz=0x10000;
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else sl->flash_pgsz=0x20000;
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}
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else return (sl->flash_pgsz);
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return (sl->flash_pgsz);
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}
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|
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int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
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{
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/* page an addr in the page to erase */
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@ -841,13 +847,11 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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unlock_flash_if(sl);
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/* select the page to erase */
|
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//Page is passed to us as an addr, so calculate the actual page
|
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uint32_t addr=page;
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// calculate the actual page from the address
|
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uint32_t sector=calculate_F4_sectornum(flashaddr);
|
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page=calculate_F4_sectornum(addr);
|
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|
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fprintf(stderr, "Erasing Sector:%u SectorSize:%u\n", page, calculate_sectorsize(sl, addr));
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write_flash_cr_snb(sl, page);
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fprintf(stderr, "EraseFlash - Sector:0x%x Size:0x%x\n", sector, stlink_calculate_pagesize(sl, flashaddr));
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write_flash_cr_snb(sl, sector);
|
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|
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/* start erase operation */
|
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set_flash_cr_strt(sl);
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@ -858,8 +862,9 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
|
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/* relock the flash */
|
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//todo: fails to program if this is in
|
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lock_flash(sl);
|
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fprintf(stdout, "Erase Final CR:%X\n", read_flash_cr(sl));
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|
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#if DEBUG_FLASH
|
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fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
|
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#endif
|
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}
|
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|
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else if (sl->core_id == STM32L_CORE_ID)
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@ -928,7 +933,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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|
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/* write 0 to the first word of the page to be erased */
|
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memset(sl->q_buf, 0, sizeof(uint32_t));
|
||||
stlink_write_mem32(sl, page, sizeof(uint32_t));
|
||||
stlink_write_mem32(sl, flashaddr, sizeof(uint32_t));
|
||||
|
||||
/* reset lock bits */
|
||||
stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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||||
|
|
@ -948,7 +953,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
|
|||
set_flash_cr_per(sl);
|
||||
|
||||
/* select the page to erase */
|
||||
write_flash_ar(sl, page);
|
||||
write_flash_ar(sl, flashaddr);
|
||||
|
||||
/* start erase operation, reset by hw with bsy bit */
|
||||
set_flash_cr_strt(sl);
|
||||
|
|
@ -1068,7 +1073,7 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
|
|||
}
|
||||
else
|
||||
{
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
fprintf(stderr, "unknown coreid: 0x%x\n", sl->core_id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
@ -1104,12 +1109,8 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
|
|||
|
||||
stlink_identify_device(sl);
|
||||
|
||||
#if 0 /* todo: use in debugging mode only */
|
||||
fprintf(stdout, "WriteFlash - addr:%x len:%x\n", addr, len);
|
||||
fprintf(stdout, "CoreID:%X ChipID:%X\n", sl->core_id, sl->chip_id);
|
||||
#endif
|
||||
|
||||
/* check addr range is inside the flash */
|
||||
stlink_calculate_pagesize(sl, addr);
|
||||
if (addr < sl->flash_base) {
|
||||
fprintf(stderr, "addr too low\n");
|
||||
return -1;
|
||||
|
|
@ -1128,14 +1129,20 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
|
|||
}
|
||||
|
||||
/* erase each page */
|
||||
for (off = 0; off < len; off += calculate_sectorsize(sl, addr + off) ) {
|
||||
/* addr must be an addr inside the page */
|
||||
for (off = 0; off < len; off += stlink_calculate_pagesize(sl, addr + off) ) {
|
||||
//addr must be an addr inside the page
|
||||
if (stlink_erase_flash_page(sl, addr + off) == -1) {
|
||||
fprintf(stderr, "erase_flash_page(0x%zx) == -1\n", addr + off);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
#if 1 /* todo: use in debugging mode only */
|
||||
fprintf(stdout, "WriteFlash - Addr:0x%x len:0x%x\n", addr, len);
|
||||
//fprintf(stdout, "CoreID:0x%x ChipID:0x%x\n", sl->core_id, sl->chip_id);
|
||||
#endif
|
||||
|
||||
|
||||
if (sl->chip_id == STM32F4_CHIP_ID) {
|
||||
/* todo: check write operation */
|
||||
|
||||
|
|
@ -1172,7 +1179,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
|
|||
lock_flash(sl);
|
||||
|
||||
#if 0 /* todo: debug mode */
|
||||
fprintf(stdout, "Final CR:%X\n", read_flash_cr(sl));
|
||||
fprintf(stdout, "Final CR:0x%x\n", read_flash_cr(sl));
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1262,7 +1269,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
|
|||
if (off % sl->flash_pgsz) off &= ~(sl->flash_pgsz - 1);
|
||||
page = addr + off;
|
||||
|
||||
fprintf(stderr, "invalid write @%x(%x): %x != %x. retrying.\n",
|
||||
fprintf(stderr, "invalid write @0x%x(0x%x): 0x%x != 0x%x. retrying.\n",
|
||||
page, addr + off, read_uint32(base + off, 0), read_uint32(sl->q_buf, 0));
|
||||
|
||||
/* reset lock bits */
|
||||
|
|
@ -1343,7 +1350,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
|
|||
if (aligned_size & (4 - 1))
|
||||
aligned_size = (cmp_size + 4) & ~(4 - 1);
|
||||
|
||||
fprintf(stdout, "AlignedSize:%x\n", aligned_size);
|
||||
fprintf(stdout, "AlignedSize:0x%x\n", aligned_size);
|
||||
stlink_read_mem32(sl, addr + off, aligned_size);
|
||||
|
||||
if (memcmp(sl->q_buf, base + off, cmp_size))
|
||||
|
|
@ -1409,7 +1416,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
|
||||
} else {
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
fprintf(stderr, "unknown coreid: 0x%x\n", sl->core_id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
@ -1441,7 +1448,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
|
||||
} else {
|
||||
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
fprintf(stderr, "unknown coreid: 0x%x\n", sl->core_id);
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -243,7 +243,8 @@ extern "C" {
|
|||
|
||||
// privates, publics, the rest....
|
||||
// TODO sort what is private, and what is not
|
||||
int stlink_erase_flash_page(stlink_t* sl, stm32_addr_t page);
|
||||
int stlink_erase_flash_page(stlink_t* sl, stm32_addr_t flashaddr);
|
||||
uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr);
|
||||
uint16_t read_uint16(const unsigned char *c, const int pt);
|
||||
void stlink_core_stat(stlink_t *sl);
|
||||
void stlink_print_data(stlink_t *sl);
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue