kopia lustrzana https://github.com/stlink-org/stlink
commit
86ad03e774
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@ -140,7 +140,7 @@ extern "C" {
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// also the Reference manuals. (flash size reg is normally in ref man)
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static const chip_params_t devices[] = {
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{ // table 2, PM0063
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.chip_id = 0x410,
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.chip_id = STM32_CHIPID_F1_MEDIUM,
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.description = "F1 Medium-density device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x400,
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@ -149,7 +149,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x800
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},
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{ // table 1, PM0059
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.chip_id = 0x411,
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.chip_id = STM32_CHIPID_F2,
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.description = "F2 device",
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.flash_size_reg = 0, /* no flash size reg found in the docs! */
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.flash_pagesize = 0x20000,
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@ -158,7 +158,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x7800
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},
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{ // PM0063
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.chip_id = 0x412,
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.chip_id = STM32_CHIPID_F1_LOW,
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.description = "F1 Low-density device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x400,
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@ -167,7 +167,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x800
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},
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{
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.chip_id = 0x413,
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.chip_id = STM32_CHIPID_F4,
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.description = "F4 device",
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.flash_size_reg = 0x1FFF7A10, //RM0090 error same as unique ID
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.flash_pagesize = 0x4000,
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@ -176,7 +176,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x7800
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},
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{
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.chip_id = 0x414,
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.chip_id = STM32_CHIPID_F1_HIGH,
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.description = "F1 High-density device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x800,
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@ -187,7 +187,7 @@ static const chip_params_t devices[] = {
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{
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// This ignores the EEPROM! (and uses the page erase size,
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// not the sector write protection...)
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.chip_id = 0x416,
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.chip_id = STM32_CHIPID_L1_MEDIUM,
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.description = "L1 Med-density device",
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.flash_size_reg = 0x1ff8004c,
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.flash_pagesize = 0x100,
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@ -205,7 +205,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x1000
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},
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{
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.chip_id = 0x418,
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.chip_id = STM32_CHIPID_F1_CONN,
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.description = "F1 Connectivity line device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x800,
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@ -214,7 +214,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x4800
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},
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{
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.chip_id = 0x420,
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.chip_id = STM32_CHIPID_F1_VL_MEDIUM,
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.description = "F1 Medium-density Value Line device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x400,
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@ -225,7 +225,7 @@ static const chip_params_t devices[] = {
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{
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// This is STK32F303VCT6 device from STM32 F3 Discovery board.
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// Support based on DM00043574.pdf (RM0316) document.
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.chip_id = 0x422,
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.chip_id = STM32_CHIPID_F3,
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.description = "F3 device",
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.flash_size_reg = 0x1ffff7cc,
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.flash_pagesize = 0x800,
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@ -236,7 +236,7 @@ static const chip_params_t devices[] = {
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{
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// This is STK32F373VCT6 device from STM32 F373 eval board
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// Support based on 303 above (37x and 30x have same memory map)
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.chip_id = 0x432,
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.chip_id = STM32_CHIPID_F37x,
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.description = "F3 device",
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.flash_size_reg = 0x1ffff7cc,
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.flash_pagesize = 0x800,
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@ -245,7 +245,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x800
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},
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{
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.chip_id = 0x428,
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.chip_id = STM32_CHIPID_F1_VL_HIGH,
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.description = "F1 High-density value line device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x800,
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@ -254,7 +254,7 @@ static const chip_params_t devices[] = {
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.bootrom_size = 0x800
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},
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{
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.chip_id = 0x430,
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.chip_id = STM32_CHIPID_F1_XL,
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.description = "F1 XL-density device",
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.flash_size_reg = 0x1ffff7e0,
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.flash_pagesize = 0x800,
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@ -265,7 +265,7 @@ static const chip_params_t devices[] = {
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{
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//Use this as an example for mapping future chips:
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//RM0091 document was used to find these paramaters
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.chip_id = 0x440,
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.chip_id = STM32_CHIPID_F0,
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.description = "F0 device",
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.flash_size_reg = 0x1ffff7cc, // "Flash size data register" (pg735)
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.flash_pagesize = 0x400, // Page sizes listed in Table 4
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