kopia lustrzana https://github.com/stlink-org/stlink
Replace remaining _mem32 single word accesses with _debug32
rodzic
5652cee37d
commit
7f0e9ada38
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@ -368,9 +368,7 @@ uint32_t stlink_core_id(stlink_t *sl) {
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}
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uint32_t stlink_chip_id(stlink_t *sl) {
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stlink_read_mem32(sl, 0xE0042000, 4);
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uint32_t chip_id = sl->q_buf[0] | (sl->q_buf[1] << 8) | (sl->q_buf[2] << 16) |
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(sl->q_buf[3] << 24);
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uint32_t chip_id = stlink_read_debug32(sl, 0xE0042000);
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return chip_id;
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}
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@ -380,8 +378,7 @@ uint32_t stlink_chip_id(stlink_t *sl) {
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* @param cpuid pointer to the result object
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*/
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void stlink_cpu_id(stlink_t *sl, cortex_m3_cpuid_t *cpuid) {
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stlink_read_mem32(sl, CM3_REG_CPUID, 4);
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uint32_t raw = read_uint32(sl->q_buf, 0);
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uint32_t raw = stlink_read_debug32(sl, CM3_REG_CPUID);
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cpuid->implementer_id = (raw >> 24) & 0x7f;
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cpuid->variant = (raw >> 20) & 0xf;
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cpuid->part = (raw >> 4) & 0xfff;
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@ -428,8 +425,7 @@ int stlink_load_device_params(stlink_t *sl) {
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} else if ((chip_id & 0xFFF) == STM32_CHIPID_F4) {
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sl->flash_size = 0x100000; //todo: RM0090 error; size register same address as unique ID
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} else {
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stlink_read_mem32(sl, params->flash_size_reg, 4);
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uint32_t flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
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uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0xffff;
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sl->flash_size = flash_size * 1024;
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}
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sl->flash_pgsz = params->flash_pagesize;
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