diff --git a/gdbserver/gdb-server.c b/gdbserver/gdb-server.c index f0e9653..daacb85 100644 --- a/gdbserver/gdb-server.c +++ b/gdbserver/gdb-server.c @@ -316,6 +316,29 @@ static const char* const memory_map_template_F4 = " " // option byte area ""; +static const char* const memory_map_template_F4_HD = + "" + "" + "" + " " // code = sram, bootrom or flash; flash is bigger + " " // ccm ram + " " // sram + " " //Sectors 0..3 + " 0x4000" //16kB + " " + " " //Sector 4 + " 0x10000" //64kB + " " + " " //Sectors 5..11 + " 0x20000" //128kB + " " + " " // peripheral regs + " " // cortex regs + " " // bootrom + " " // option byte area + ""; + static const char* const memory_map_template = "" "chip_id==STM32_CHIPID_F4 || sl->chip_id==STM32_CHIPID_F4_HD) { + if(sl->chip_id==STM32_CHIPID_F4) { strcpy(map, memory_map_template_F4); + } else if(sl->chip_id==STM32_CHIPID_F4_HD) { + strcpy(map, memory_map_template_F4_HD); } else { snprintf(map, 4096, memory_map_template, sl->flash_size, diff --git a/src/stlink-common.h b/src/stlink-common.h index ca50c91..aeeaa85 100644 --- a/src/stlink-common.h +++ b/src/stlink-common.h @@ -211,7 +211,7 @@ extern "C" { .description = "F42x and F43x device", .flash_size_reg = 0x1FFF7A22, /* As in rm0090 since Rev 2*/ .flash_pagesize = 0x4000, - .sram_size = 0x30000, + .sram_size = 0x40000, .bootrom_base = 0x1fff0000, .bootrom_size = 0x7800 },