kopia lustrzana https://github.com/stlink-org/stlink
Merge branch 'master' of https://github.com/burnsfisher/stlink
Fabien Le Mentec
commit
57d068097e
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@ -20,6 +20,7 @@ config.status
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compile
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st-flash
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st-util
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st-term
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test_usb
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test_sg
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*.deps*
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@ -464,7 +464,7 @@ int stlink_load_device_params(stlink_t *sl) {
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} else if (sl->chip_id == STM32_CHIPID_F4 ||
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sl->chip_id == STM32_CHIPID_F4_LP) {
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sl->flash_size = 0x100000; //todo: RM0090 error; size register same address as unique ID
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
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// if the flash size is zero, we assume it is 128k, if not we calculate the real value
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uint32_t flash_size = stlink_read_debug32(sl,params->flash_size_reg) & 0xffff;
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if ( flash_size == 0 ) {
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@ -472,7 +472,7 @@ int stlink_load_device_params(stlink_t *sl) {
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} else {
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sl->flash_size = flash_size * 1024;
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}
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} else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_MEDIUM_PLUS) {
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} else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_HIGH) {
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uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0x1;
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// 0 is 384k and 1 is 256k
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if ( flash_size == 0 ) {
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@ -923,7 +923,8 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size)
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int error = -1;
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size_t off;
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int num_empty = 0;
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unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff;
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unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH) ? 0:0xff;
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const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700);
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if (fd == -1) {
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@ -1050,7 +1051,8 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
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#if DEBUG_FLASH
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fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
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#endif
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
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} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH) {
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uint32_t val;
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@ -1159,7 +1161,8 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
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}
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int stlink_erase_flash_mass(stlink_t *sl) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH) {
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/* erase each page */
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int i = 0, num_pages = sl->flash_size/sl->flash_pgsz;
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for (i = 0; i < num_pages; i++) {
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@ -1329,7 +1332,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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const uint8_t* loader_code;
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size_t loader_size;
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) { /* stm32l */
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH ) { /* stm32l */
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loader_code = loader_code_stm32l;
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loader_size = sizeof(loader_code_stm32l);
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} else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) {
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@ -1571,7 +1575,8 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t
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} //STM32F4END
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else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
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else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH ) {
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/* use fast word write. todo: half page. */
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uint32_t val;
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@ -1727,7 +1732,8 @@ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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/* write the file in flash at addr */
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int err;
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unsigned int num_empty = 0, index;
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unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff;
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unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH )?0:0xff;
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mapped_file_t mf = MAPPED_FILE_INITIALIZER;
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if (map_file(&mf, path) == -1) {
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ELOG("map_file() == -1\n");
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@ -1765,7 +1771,8 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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return -1;
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}
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH ) {
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size_t count = size / sizeof(uint32_t);
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if (size % sizeof(uint32_t)) ++count;
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@ -1808,7 +1815,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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/* run loader */
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stlink_run(sl);
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#define WAIT_ROUNDS 1000
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#define WAIT_ROUNDS 10000
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/* wait until done (reaches breakpoint) */
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for (i = 0; i < WAIT_ROUNDS; i++) {
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usleep(10);
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@ -1822,7 +1829,8 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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}
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/* check written byte count */
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
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if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
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|| sl->chip_id == STM32_CHIPID_L1_HIGH ) {
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size_t count = size / sizeof(uint32_t);
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if (size % sizeof(uint32_t)) ++count;
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@ -105,7 +105,13 @@ extern "C" {
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#define STM32_CHIPID_F4_LP 0x423
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#define STM32_CHIPID_F1_HIGH 0x414
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#define STM32_CHIPID_L1_MEDIUM 0x416
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#define STM32_CHIPID_L1_MEDIUM_PLUS 0x436
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#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
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/*
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* 0x436 is actually assigned to some L1 chips that are called "Medium-Plus"
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* and some that are called "High". 0x427 is assigned to the other "Medium-
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* plus" chips. To make it a bit simpler we just call 427 MEDIUM_PLUS and
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* 0x436 HIGH.
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*/
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#define STM32_CHIPID_L1_HIGH 0x436
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#define STM32_CHIPID_F1_CONN 0x418
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#define STM32_CHIPID_F1_VL_MEDIUM 0x420
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@ -209,12 +215,22 @@ static const chip_params_t devices[] = {
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{
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.chip_id = STM32_CHIPID_L1_MEDIUM_PLUS,
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.description = "L1 Medium-Plus-density device",
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.flash_size_reg = 0x1ff800CC,
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.flash_size_reg = 0x1ff800cc,
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.flash_pagesize = 0x100,
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.sram_size = 0x8000,
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.sram_size = 0x8000,/*Not completely clear if there are some with 48K*/
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.bootrom_base = 0x1ff00000,
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.bootrom_size = 0x1000
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},
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{
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.chip_id = STM32_CHIPID_L1_HIGH,
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.description = "L1 High-density device",
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.flash_size_reg = 0x1ff800cc,
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.flash_pagesize = 0x100,
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.sram_size = 0xC000, /*Not completely clear if there are some with 32K*/
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.bootrom_base = 0x1ff00000,
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.bootrom_size = 0x1000
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},
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{
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.chip_id = STM32_CHIPID_F1_CONN,
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.description = "F1 Connectivity line device",
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