kopia lustrzana https://github.com/stlink-org/stlink
Fix flash writing for VL cores.
The change from run->step breaks the VL cores. Need to double check that this still works for L cores. The whole flash writing needs to be better abstracted. Lots more informational debug.pull/29/head
rodzic
0c587eedfd
commit
3c6f2f5231
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@ -24,7 +24,7 @@
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/* todo: stm32l15xxx flash memory, pm0062 manual */
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/* stm32f FPEC flash controller interface, pm0063 manual */
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// TODO - all of this needs to be abstracted out....
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#define FLASH_REGS_ADDR 0x40022000
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#define FLASH_REGS_SIZE 0x28
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@ -412,7 +412,7 @@ void stlink_version(stlink_t *sl) {
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}
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void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len) {
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DLOG("*** stlink_write_mem32 ***\n");
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DLOG("*** stlink_write_mem32 %u bytes to %#x\n", len, addr);
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if (len % 4 != 0) {
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fprintf(stderr, "Error: Data length doesn't have a 32 bit alignment: +%d byte.\n", len % 4);
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return;
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@ -744,7 +744,7 @@ int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, s
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int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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{
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/* page an addr in the page to erase */
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ILOG("Erasing flash page at addr: %#x\n", page);
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if (sl->core_id == STM32L_CORE_ID)
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{
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#define STM32L_FLASH_REGS_ADDR ((uint32_t)0x40023c00)
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@ -853,7 +853,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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lock_flash(sl);
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}
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else {
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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WLOG("unknown coreid: %x\n", sl->core_id);
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return -1;
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}
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@ -891,13 +891,13 @@ int init_flash_loader(stlink_t *sl, flash_loader_t* fl) {
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/* allocate the loader in sram */
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if (write_loader_to_sram(sl, &fl->loader_addr, &size) == -1) {
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fprintf(stderr, "write_loader_to_sram() == -1\n");
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WLOG("Failed to write flash loader to sram!\n");
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return -1;
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}
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/* allocate a one page buffer in sram right after loader */
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fl->buf_addr = fl->loader_addr + size;
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ILOG("Successfully loaded flash loader in sram\n");
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return 0;
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}
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@ -960,7 +960,7 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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}
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else
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{
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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WLOG("unknown coreid, not sure what flash loader to use, aborting!: %x\n", sl->core_id);
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return -1;
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}
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@ -994,33 +994,38 @@ int stlink_fcheck_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned len) {
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size_t off;
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flash_loader_t fl;
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ILOG("Attempting to write %d (%#x) bytes to stm32 address: %u (%#x)\n",
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len, len, addr, addr);
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/* check addr range is inside the flash */
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if (addr < sl->flash_base) {
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fprintf(stderr, "addr too low\n");
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WLOG("addr too low\n");
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return -1;
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} else if ((addr + len) < addr) {
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fprintf(stderr, "addr overruns\n");
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WLOG("addr overruns\n");
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return -1;
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} else if ((addr + len) > (sl->flash_base + sl->flash_size)) {
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fprintf(stderr, "addr too high\n");
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WLOG("addr too high\n");
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return -1;
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} else if ((addr & 1) || (len & 1)) {
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fprintf(stderr, "unaligned addr or size\n");
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WLOG("unaligned addr or size\n");
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return -1;
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} else if (addr & (sl->flash_pgsz - 1)) {
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fprintf(stderr, "addr not a multiple of pagesize, not supported\n");
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WLOG("addr not a multiple of pagesize, not supported\n");
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return -1;
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}
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/* erase each page */
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int page_count = 0;
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for (off = 0; off < len; off += sl->flash_pgsz) {
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/* addr must be an addr inside the page */
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if (stlink_erase_flash_page(sl, addr + off) == -1) {
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fprintf(stderr, "erase_flash_page(0x%zx) == -1\n", addr + off);
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return -1;
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WLOG("Failed to erase_flash_page(%#zx) == -1\n", addr + off);
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return -1;
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}
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page_count++;
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}
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ILOG("Finished erasing %d pages of %d (%#x) bytes\n",
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page_count, sl->flash_pgsz, sl->flash_pgsz);
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if (sl->core_id == STM32L_CORE_ID)
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{
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@ -1139,39 +1144,41 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else if (sl->core_id == STM32VL_CORE_ID)
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{
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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fprintf(stderr, "init_flash_loader() == -1\n");
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return -1;
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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#define WRITE_BLOCK_SIZE 0x40
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for (off = 0; off < len; off += WRITE_BLOCK_SIZE)
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{
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/* adjust last write size */
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size_t size = WRITE_BLOCK_SIZE;
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if ((off + WRITE_BLOCK_SIZE) > len) size = len - off;
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/* unlock and set programming mode */
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unlock_flash_if(sl);
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set_flash_cr_pg(sl);
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if (run_flash_loader(sl, &fl, addr + off, base + off, size) == -1) {
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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return -1;
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} else if (sl->core_id == STM32VL_CORE_ID) {
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ILOG("Starting Flash write for VL core id\n");
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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WLOG("init_flash_loader() == -1\n");
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return -1;
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}
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lock_flash(sl);
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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#define WRITE_BLOCK_SIZE 0x40
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int write_block_count = 0;
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for (off = 0; off < len; off += WRITE_BLOCK_SIZE) {
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ILOG("Writing flash block %d of size %d (%#x)\n", write_block_count,
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WRITE_BLOCK_SIZE, WRITE_BLOCK_SIZE);
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/* adjust last write size */
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size_t size = WRITE_BLOCK_SIZE;
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if ((off + WRITE_BLOCK_SIZE) > len) size = len - off;
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/* unlock and set programming mode */
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unlock_flash_if(sl);
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set_flash_cr_pg(sl);
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//DLOG("Finished setting flash cr pg, running loader!\n");
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if (run_flash_loader(sl, &fl, addr + off, base + off, size) == -1) {
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WLOG("run_flash_loader(%#zx) failed! == -1\n", addr + off);
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return -1;
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}
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lock_flash(sl);
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DLOG("Finished writing block %d\n", write_block_count++);
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}
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} else {
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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return -1;
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WLOG("unknown coreid, not sure how to write: %x\n", sl->core_id);
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return -1;
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}
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ILOG("Starting verification of write complete\n");
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for (off = 0; off < len; off += sl->flash_pgsz) {
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size_t aligned_size;
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@ -1189,32 +1196,35 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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if (memcmp(sl->q_buf, base + off, cmp_size))
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return -1;
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}
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ILOG("Flash written and verified! jolly good!\n");
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return 0;
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}
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/**
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* Write the given binary file into flash at address "addr"
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* @param sl
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* @param path readable file path, should be binary image
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* @param addr where to start writing
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* @return 0 on success, -ve on failure.
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*/
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int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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/* write the file in flash at addr */
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int err;
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mapped_file_t mf = MAPPED_FILE_INITIALIZER;
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if (map_file(&mf, path) == -1) {
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fprintf(stderr, "map_file() == -1\n");
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WLOG("map_file() == -1\n");
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return -1;
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}
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err = stlink_write_flash(sl, addr, mf.base, mf.len);
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unmap_file(&mf);
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return err;
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}
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int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
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reg rr;
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DLOG("Running flash loader, write address:%#x, size: %zd\n", target, size);
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// FIXME This can never return -1
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if (write_buffer_to_sram(sl, fl, buf, size) == -1) {
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fprintf(stderr, "write_buffer_to_sram() == -1\n");
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return -1;
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@ -1250,7 +1260,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
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}
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/* run loader */
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stlink_step(sl);
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stlink_run(sl);
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/* wait until done (reaches breakpoint) */
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while (is_core_halted(sl) == 0) ;
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