diff --git a/src/stlink-common.c b/src/stlink-common.c index 6e327f0..3256ccd 100644 --- a/src/stlink-common.c +++ b/src/stlink-common.c @@ -1385,7 +1385,7 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) { sl->chip_id == STM32_CHIPID_F4_LP || sl->chip_id == STM32_CHIPID_F4_HD || (sl->chip_id == STM32_CHIPID_F411RE)){ loader_code = loader_code_stm32f4; loader_size = sizeof(loader_code_stm32f4); - } else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F04 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL) { + } else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F04 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL || sl->chip_id == STM32_CHIPID_F09X) { loader_code = loader_code_stm32f0; loader_size = sizeof(loader_code_stm32f0); } else if (sl->chip_id == STM32_CHIPID_L0) { diff --git a/src/stlink-common.h b/src/stlink-common.h index aeeaa85..04a1081 100644 --- a/src/stlink-common.h +++ b/src/stlink-common.h @@ -129,7 +129,7 @@ extern "C" { #define STM32_CHIPID_F3_SMALL 0x439 #define STM32_CHIPID_F0 0x440 - +#define STM32_CHIPID_F09X 0x442 #define STM32_CHIPID_F0_SMALL 0x444 #define STM32_CHIPID_F04 0x445 @@ -369,6 +369,15 @@ extern "C" { .bootrom_base = 0x1fffec00, // "System memory" starting address from Table 2 .bootrom_size = 0xC00 // "System memory" byte size in hex from Table 2 }, + { + .chip_id = STM32_CHIPID_F09X, + .description = "F09X device", + .flash_size_reg = 0x1ffff7cc, // "Flash size data register" (pg735) + .flash_pagesize = 0x800, // Page sizes listed in Table 4 (pg 56) + .sram_size = 0x8000, // "SRAM" byte size in hex from Table 2 (pg 50) + .bootrom_base = 0x1fffd800, // "System memory" starting address from Table 2 + .bootrom_size = 0x2000 // "System memory" byte size in hex from Table 2 + }, { //Use this as an example for mapping future chips: //RM0091 document was used to find these paramaters