kopia lustrzana https://github.com/stlink-org/stlink
[update] factorize flash writing code. use core_id to identify.
Fabien Le Mentec
rodzic
a2d758e29b
commit
224966f637
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@ -97,7 +97,7 @@ int main(int ac, char** av)
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}
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else /* stlinkv2 */
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{
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sl = stlink_open_usb(0);
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sl = stlink_open_usb(1);
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if (sl == NULL) goto on_error;
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}
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@ -287,7 +287,6 @@ uint32_t stlink_core_id(stlink_t *sl) {
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sl->backend->core_id(sl);
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if (sl->verbose > 2)
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stlink_print_data(sl);
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DD(sl, "core_id = 0x%08x\n", sl->core_id);
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return sl->core_id;
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}
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@ -707,7 +706,8 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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{
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/* page an addr in the page to erase */
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if (sl->core_id == 0x2ba01477) /* stm32l */
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stlink_core_id(sl);
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if (sl->core_id == STM32L_CORE_ID)
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{
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#define STM32L_FLASH_REGS_ADDR ((uint32_t)0x40023c00)
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#define STM32L_FLASH_ACR (STM32L_FLASH_REGS_ADDR + 0x00)
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@ -733,7 +733,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 0))
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{
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fprintf(stderr, "pecr.pelock not clear\n");
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fprintf(stderr, "pecr.pelock not clear (0x%x)\n", val);
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return -1;
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}
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@ -748,7 +748,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 1))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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fprintf(stderr, "pecr.prglock not clear (0x%x)\n", val);
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return -1;
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}
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@ -791,7 +791,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else /* stm32vl */
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else if (sl->core_id == STM32VL_CORE_ID)
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{
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/* wait for ongoing op to finish */
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wait_flash_busy(sl);
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@ -814,6 +814,10 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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/* relock the flash */
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lock_flash(sl);
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}
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else {
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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return -1;
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}
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/* todo: verify the erased page */
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@ -906,16 +910,21 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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const uint8_t* loader_code;
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size_t loader_size;
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if (sl->core_id == 0x2ba01477) /* stm32l */
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if (sl->core_id == STM32L_CORE_ID) /* stm32l */
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{
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loader_code = loader_code_stm32l;
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loader_size = sizeof(loader_code_stm32l);
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}
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else /* stm32vl */
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else if (sl->core_id == STM32VL_CORE_ID)
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{
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loader_code = loader_code_stm32vl;
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loader_size = sizeof(loader_code_stm32vl);
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}
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else
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{
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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return -1;
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}
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memcpy(sl->q_buf, loader_code, loader_size);
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stlink_write_mem32(sl, sl->sram_base, loader_size);
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@ -944,8 +953,6 @@ int stlink_fcheck_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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}
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#define WRITE_BLOCK_SIZE 0x40
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int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned len) {
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size_t off;
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flash_loader_t fl;
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@ -963,19 +970,12 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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} else if ((addr & 1) || (len & 1)) {
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fprintf(stderr, "unaligned addr or size\n");
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return -1;
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} else if (addr & (sl->flash_pgsz - 1)) {
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fprintf(stderr, "addr not a multiple of pagesize, not supported\n");
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return -1;
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}
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/* needed for specializing loader */
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stlink_core_id(sl);
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if (sl->core_id == 0x2ba01477) /* stm32l */
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{
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/* use fast word write. todo: half page. */
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/* todo, factorize with stlink_fwrite_flash */
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uint32_t val;
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uint32_t off;
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/* erase each page */
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for (off = 0; off < len; off += sl->flash_pgsz) {
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/* addr must be an addr inside the page */
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if (stlink_erase_flash_page(sl, addr + off) == -1) {
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@ -984,6 +984,21 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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}
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}
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stlink_core_id(sl);
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if (sl->core_id == STM32L_CORE_ID)
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{
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/* use fast word write. todo: half page. */
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uint32_t val;
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#if 0 /* todo: check write operation */
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uint32_t nwrites = sl->flash_pgsz;
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redo_write:
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#endif /* todo: check write operation */
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/* disable pecr protection */
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write_uint32(sl->q_buf, 0x89abcdef);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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@ -1017,6 +1032,18 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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/* write a word in program memory */
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for (off = 0; off < len; off += sizeof(uint32_t))
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{
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if (sl->verbose >= 1)
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{
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if ((off & (sl->flash_pgsz - 1)) == 0)
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{
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/* show progress. writing procedure is slow
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and previous errors are misleading */
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const uint32_t pgnum = off / sl->flash_pgsz;
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const uint32_t pgcount = len / sl->flash_pgsz;
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fprintf(stdout, "%u pages written out of %u\n", pgnum, pgcount);
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}
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}
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memcpy(sl->q_buf, (const void*)(base + off), sizeof(uint32_t));
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stlink_write_mem32(sl, addr + off, sizeof(uint32_t));
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@ -1026,16 +1053,57 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t));
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if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ;
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}
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#if 0 /* todo: check redo write operation */
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/* check written bytes. todo: should be on a per page basis. */
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stlink_read_mem32(sl, addr + off, sizeof(uint32_t));
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if (memcmp(sl->q_buf, base + off, sizeof(uint32_t)))
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{
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/* re erase the page and redo the write operation */
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uint32_t page;
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uint32_t val;
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/* fail if successive write count too low */
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if (nwrites < sl->flash_pgsz) {
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fprintf(stderr, "writes operation failure count too high, aborting\n");
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return -1;
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}
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nwrites = 0;
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/* assume addr aligned */
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if (off % sl->flash_pgsz) off &= ~(sl->flash_pgsz - 1);
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page = addr + off;
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fprintf(stderr, "invalid write @%x(%x): %x != %x. retrying.\n",
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page, addr + off, read_uint32(base + off, 0), read_uint32(sl->q_buf, 0));
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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stlink_erase_flash_page(sl, page);
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goto redo_write;
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}
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else /* stm32vl */
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/* increment successive writes counter */
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++nwrites;
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#endif /* todo: check redo write operation */
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}
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else if (sl->core_id == STM32VL_CORE_ID)
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{
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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@ -1044,6 +1112,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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#define WRITE_BLOCK_SIZE 0x40
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for (off = 0; off < len; off += WRITE_BLOCK_SIZE)
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{
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/* adjust last write size */
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@ -1061,6 +1130,9 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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lock_flash(sl);
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}
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} else {
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fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
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return -1;
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}
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for (off = 0; off < len; off += sl->flash_pgsz) {
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@ -1087,193 +1159,19 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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/* write the file in flash at addr */
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int error = -1;
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size_t off;
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int err;
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mapped_file_t mf = MAPPED_FILE_INITIALIZER;
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flash_loader_t fl;
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if (map_file(&mf, path) == -1) {
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fprintf(stderr, "map_file() == -1\n");
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return -1;
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}
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/* check addr range is inside the flash */
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if (addr < sl->flash_base) {
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fprintf(stderr, "addr too low\n");
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goto on_error;
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} else if ((addr + mf.len) < addr) {
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fprintf(stderr, "addr overruns\n");
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goto on_error;
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} else if ((addr + mf.len) > (sl->flash_base + sl->flash_size)) {
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fprintf(stderr, "addr too high\n");
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goto on_error;
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} else if ((addr & (sl->flash_pgsz - 1)) || (mf.len & 1)) {
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/* todo */
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fprintf(stderr, "unaligned addr or size\n");
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goto on_error;
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}
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err = stlink_write_flash(sl, addr, mf.base, mf.len);
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/* needed for specializing loader */
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stlink_core_id(sl);
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/* erase each page. todo: mass erase faster? */
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for (off = 0; off < mf.len; off += sl->flash_pgsz) {
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/* addr must be an addr inside the page */
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if (stlink_erase_flash_page(sl, addr + off) == -1) {
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fprintf(stderr, "erase_flash_page(0x%zx) == -1\n", addr + off);
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goto on_error;
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}
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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if (sl->core_id == 0x2ba01477) /* stm32l */
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{
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/* use fast word write. todo: half page. */
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uint32_t val;
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#if 0 /* todo: check write operation */
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uint32_t nwrites = sl->flash_pgsz;
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redo_write:
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#endif /* todo: check write operation */
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/* disable pecr protection */
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write_uint32(sl->q_buf, 0x89abcdef);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x02030405);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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/* check pecr.pelock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 0))
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{
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fprintf(stderr, "pecr.pelock not clear\n");
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goto on_error;
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}
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/* unlock program memory */
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write_uint32(sl->q_buf, 0x8c9daebf);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x13141516);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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/* check pecr.prglock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 1))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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goto on_error;
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}
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/* write a word in program memory */
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for (off = 0; off < mf.len; off += sizeof(uint32_t))
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{
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memcpy(sl->q_buf, (const void*)(mf.base + off), sizeof(uint32_t));
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stlink_write_mem32(sl, addr + off, sizeof(uint32_t));
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/* wait for sr.busy to be cleared */
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while (1)
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{
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stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t));
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if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ;
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}
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#if 0 /* todo: check write operation */
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/* check written bytes. todo: should be on a per page basis. */
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stlink_read_mem32(sl, addr + off, sizeof(uint32_t));
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if (memcmp(sl->q_buf, mf.base + off, sizeof(uint32_t)))
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{
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/* re erase the page and redo the write operation */
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uint32_t page;
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uint32_t val;
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/* fail if successive write count too low */
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if (nwrites < sl->flash_pgsz) {
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fprintf(stderr, "writes operation failure count too high, aborting\n");
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goto on_error;
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}
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nwrites = 0;
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/* assume addr aligned */
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if (off % sl->flash_pgsz) off &= ~(sl->flash_pgsz - 1);
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page = addr + off;
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fprintf(stderr, "invalid write @%x(%x): %x != %x. retrying.\n",
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page, addr + off, read_uint32(mf.base + off, 0), read_uint32(sl->q_buf, 0));
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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stlink_erase_flash_page(sl, page);
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goto redo_write;
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}
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/* increment successive writes counter */
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++nwrites;
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#endif /* todo: check write operation */
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}
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else /* stm32vl */
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{
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#define WRITE_BLOCK_SIZE 0x40
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for (off = 0; off < mf.len; off += WRITE_BLOCK_SIZE)
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{
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/* adjust last write size */
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size_t size = WRITE_BLOCK_SIZE;
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if ((off + WRITE_BLOCK_SIZE) > mf.len) size = mf.len - off;
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/* unlock and set programming mode */
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unlock_flash_if(sl);
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set_flash_cr_pg(sl);
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if (init_flash_loader(sl, &fl) == -1) {
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fprintf(stderr, "init_flash_loader() == -1\n");
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goto on_error;
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}
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if (run_flash_loader(sl, &fl, addr + off, mf.base + off, size) == -1)
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{
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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goto on_error;
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}
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lock_flash(sl);
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}
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} /* stm32vl */
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|
||||
/* check the file ha been written */
|
||||
if (check_file(sl, &mf, addr) == -1) {
|
||||
fprintf(stderr, "check_file() == -1\n");
|
||||
goto on_error;
|
||||
}
|
||||
|
||||
/* success */
|
||||
error = 0;
|
||||
|
||||
on_error:
|
||||
unmap_file(&mf);
|
||||
return error;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
|
||||
|
|
@ -1285,7 +1183,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
return -1;
|
||||
}
|
||||
|
||||
if (sl->core_id == 0x2ba01477) /* stm32l */ {
|
||||
if (sl->core_id == STM32L_CORE_ID) {
|
||||
|
||||
size_t count = size / sizeof(uint32_t);
|
||||
if (size % sizeof(uint32_t)) ++count;
|
||||
|
|
@ -1297,7 +1195,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
stlink_write_reg(sl, 0, 3); /* output count */
|
||||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
|
||||
} else /* stm32vl */ {
|
||||
} else if (sl->core_id == STM32VL_CORE_ID) {
|
||||
|
||||
size_t count = size / sizeof(uint16_t);
|
||||
if (size % sizeof(uint16_t)) ++count;
|
||||
|
|
@ -1309,6 +1207,9 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
stlink_write_reg(sl, 0, 3); /* flash bank 0 (input) */
|
||||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
|
||||
} else {
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* run loader */
|
||||
|
|
@ -1318,7 +1219,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
while (is_core_halted(sl) == 0) ;
|
||||
|
||||
/* check written byte count */
|
||||
if (sl->core_id == 0x2ba01477) /* stm32l */ {
|
||||
if (sl->core_id == STM32L_CORE_ID) {
|
||||
|
||||
size_t count = size / sizeof(uint32_t);
|
||||
if (size % sizeof(uint32_t)) ++count;
|
||||
|
|
@ -1329,7 +1230,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
return -1;
|
||||
}
|
||||
|
||||
} else /* stm32vl */ {
|
||||
} else if (sl->core_id == STM32VL_CORE_ID) {
|
||||
|
||||
stlink_read_reg(sl, 2, &rr);
|
||||
if (rr.r[2] != 0) {
|
||||
|
|
@ -1337,6 +1238,11 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
|
|||
return -1;
|
||||
}
|
||||
|
||||
} else {
|
||||
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -76,6 +76,11 @@ extern "C" {
|
|||
#define CM3_REG_FP_CTRL 0xE0002000
|
||||
#define CM3_REG_FP_COMP0 0xE0002008
|
||||
|
||||
/* cortex core ids */
|
||||
#define STM32VL_CORE_ID 0x1ba01477
|
||||
#define STM32L_CORE_ID 0x2ba01477
|
||||
#define STM32F4_CORE_ID 0x2ba01477
|
||||
|
||||
/* Enough space to hold both a V2 command or a V1 command packaged as generic scsi*/
|
||||
#define C_BUF_LEN 32
|
||||
|
||||
|
|
|
|||
|
|
@ -680,15 +680,20 @@ stlink_t* stlink_open_usb(const int verbose) {
|
|||
slu->cmd_len = (slu->protocoll == 1)? STLINK_SG_SIZE: STLINK_CMD_SIZE;
|
||||
|
||||
/* success */
|
||||
|
||||
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
|
||||
printf("-- exit_dfu_mode\n");
|
||||
stlink_exit_dfu_mode(sl);
|
||||
}
|
||||
|
||||
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
|
||||
stlink_enter_swd_mode(sl);
|
||||
}
|
||||
|
||||
stlink_version(sl);
|
||||
|
||||
/* per device family initialization */
|
||||
stlink_core_id(sl);
|
||||
if (sl->core_id == 0x2ba01477) /* stm32l */ {
|
||||
if (sl->core_id == STM32L_CORE_ID) {
|
||||
|
||||
/* flash memory settings */
|
||||
sl->flash_base = STM32_FLASH_BASE;
|
||||
|
|
@ -703,7 +708,7 @@ stlink_t* stlink_open_usb(const int verbose) {
|
|||
sl->sram_base = STM32_SRAM_BASE;
|
||||
sl->sram_size = STM32L_SRAM_SIZE;
|
||||
|
||||
} else /* stm32vl */ {
|
||||
} else if (sl->core_id == STM32VL_CORE_ID) {
|
||||
|
||||
/* flash memory settings */
|
||||
sl->flash_base = STM32_FLASH_BASE;
|
||||
|
|
@ -718,6 +723,11 @@ stlink_t* stlink_open_usb(const int verbose) {
|
|||
sl->sram_base = STM32_SRAM_BASE;
|
||||
sl->sram_size = STM32_SRAM_SIZE;
|
||||
|
||||
} else {
|
||||
|
||||
fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
|
||||
goto on_libusb_error;
|
||||
|
||||
}
|
||||
|
||||
error = 0;
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue