From 1cffc453c5b9316251027da24542bf9493f6629c Mon Sep 17 00:00:00 2001
From: Christophe Levantis <Christophe.Levantis@cyantechnology.com>
Date: Wed, 7 Sep 2016 11:11:45 +0100
Subject: [PATCH] Add memory map for stm32f401xe

Trying to load a elf image on a stm32f401xe can result in a problem
of flash write if a section does not start on a flash sector because
the memory map given to gdb was wrong.
---
 src/gdbserver/gdb-server.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/src/gdbserver/gdb-server.c b/src/gdbserver/gdb-server.c
index 15f8379..f99f3e7 100644
--- a/src/gdbserver/gdb-server.c
+++ b/src/gdbserver/gdb-server.c
@@ -433,6 +433,30 @@ static const char* const memory_map_template_F7 =
     "  <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x20\"/>"         // option byte area
     "</memory-map>";
 
+
+static const char* const memory_map_template_F4_DE =
+    "<?xml version=\"1.0\"?>"
+    "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
+    "     \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
+    "<memory-map>"
+    "  <memory type=\"rom\" start=\"0x00000000\" length=\"0x80000\"/>"      // code = sram, bootrom or flash; flash is bigger
+    "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x18000\"/>"      // sram
+    "  <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">"     //Sectors 0..3
+    "    <property name=\"blocksize\">0x4000</property>"                    //16kB
+    "  </memory>"
+    "  <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">"     //Sector 4
+    "    <property name=\"blocksize\">0x10000</property>"                   //64kB
+    "  </memory>"
+    "  <memory type=\"flash\" start=\"0x08020000\" length=\"0x60000\">"     //Sectors 5..7
+    "    <property name=\"blocksize\">0x20000</property>"                   //128kB
+    "  </memory>"
+    "  <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>"   // peripheral regs
+    "  <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>"   // cortex regs
+    "  <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>"       // bootrom
+    "  <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x210\"/>"        // otp
+    "  <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>"         // option byte area
+    "</memory-map>";
+
 char* make_memory_map(stlink_t *sl) {
     /* This will be freed in serve() */
     const size_t sz = 4096;
@@ -441,6 +465,8 @@ char* make_memory_map(stlink_t *sl) {
 
     if(sl->chip_id==STLINK_CHIPID_STM32_F4 || sl->chip_id==STLINK_CHIPID_STM32_F446) {
         strcpy(map, memory_map_template_F4);
+    } else if(sl->chip_id==STLINK_CHIPID_STM32_F4_DE) {
+        strcpy(map, memory_map_template_F4_DE);
     } else if(sl->core_id==STM32F7_CORE_ID) {
         snprintf(map, sz, memory_map_template_F7,
                 sl->sram_size);