kopia lustrzana https://github.com/stlink-org/stlink
[update, wip] stm32l flash write, to be tested
rodzic
bd0492f50a
commit
165e5fd66c
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@ -30,7 +30,6 @@ void DD(stlink_t *sl, char *format, ...) {
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/* todo: stm32l15xxx flash memory, pm0062 manual */
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/* #define FLASH_REGS_ADDR 0x40022000 */
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/* stm32f FPEC flash controller interface, pm0063 manual */
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@ -87,7 +86,7 @@ uint32_t read_uint32(const unsigned char *c, const int pt) {
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char *p = (char *) &ui;
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if (!is_bigendian()) { // le -> le (don't swap)
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p[0] = c[pt];
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p[0] = c[pt + 0];
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p[1] = c[pt + 1];
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p[2] = c[pt + 2];
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p[3] = c[pt + 3];
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@ -95,7 +94,7 @@ uint32_t read_uint32(const unsigned char *c, const int pt) {
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p[0] = c[pt + 3];
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p[1] = c[pt + 2];
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p[2] = c[pt + 1];
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p[3] = c[pt];
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p[3] = c[pt + 0];
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}
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return ui;
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}
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@ -468,11 +467,11 @@ uint16_t read_uint16(const unsigned char *c, const int pt) {
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char *p = (char *) &ui;
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if (!is_bigendian()) { // le -> le (don't swap)
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p[0] = c[pt];
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p[0] = c[pt + 0];
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p[1] = c[pt + 1];
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} else {
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p[0] = c[pt + 1];
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p[1] = c[pt];
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p[1] = c[pt + 0];
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}
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return ui;
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}
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@ -492,8 +491,6 @@ void stlink_core_stat(stlink_t *sl) {
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if (sl->q_len <= 0)
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return;
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stlink_print_data(sl);
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switch (sl->q_buf[0]) {
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case STLINK_CORE_RUNNING:
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sl->core_stat = STLINK_CORE_RUNNING;
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@ -704,9 +701,96 @@ int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, s
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return 0;
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}
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int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page) {
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/* page an addr in the page to erase */
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int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
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{
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/* page an addr in the page to erase */
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if (sl->core_id == 0x2ba01477) /* stm32l */
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{
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#define STM32L_FLASH_REGS_ADDR ((uint32_t)0x40023c00)
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#define STM32L_FLASH_ACR (STM32L_FLASH_REGS_ADDR + 0x00)
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#define STM32L_FLASH_PECR (STM32L_FLASH_REGS_ADDR + 0x04)
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#define STM32L_FLASH_PDKEYR (STM32L_FLASH_REGS_ADDR + 0x08)
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#define STM32L_FLASH_PEKEYR (STM32L_FLASH_REGS_ADDR + 0x0c)
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#define STM32L_FLASH_PRGKEYR (STM32L_FLASH_REGS_ADDR + 0x10)
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#define STM32L_FLASH_OPTKEYR (STM32L_FLASH_REGS_ADDR + 0x14)
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#define STM32L_FLASH_SR (STM32L_FLASH_REGS_ADDR + 0x18)
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#define STM32L_FLASH_OBR (STM32L_FLASH_REGS_ADDR + 0x0c)
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#define STM32L_FLASH_WRPR (STM32L_FLASH_REGS_ADDR + 0x20)
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uint32_t val;
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/* disable pecr protection */
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write_uint32(sl->q_buf, 0x89abcdef);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x02030405);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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/* check pecr.pelock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 0))
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{
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fprintf(stderr, "pecr.pelock not clear\n");
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return -1;
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}
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/* unlock program memory */
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write_uint32(sl->q_buf, 0x8c9daebf);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x13141516);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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/* check pecr.prglock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 1))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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return -1;
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}
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/* unused: unlock the option byte block */
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#if 0
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write_uint32(sl->q_buf, 0xfbead9c8);
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stlink_write_mem32(sl, STM32L_FLASH_OPTKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x24252627);
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stlink_write_mem32(sl, STM32L_FLASH_OPTKEYR, sizeof(uint32_t));
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/* check pecr.optlock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 2))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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return -1;
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}
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#endif
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/* set pecr.{erase,prog} */
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val |= (1 << 9) | (1 << 3);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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/* wait for sr.busy to be cleared */
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while (1)
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{
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stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t));
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if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ;
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}
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/* write 0 to the first word of the page to be erased */
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memset(sl->q_buf, 0, sizeof(uint32_t));
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stlink_write_mem32(sl, page, sizeof(uint32_t));
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else /* stm32vl */
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{
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/* wait for ongoing op to finish */
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wait_flash_busy(sl);
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@ -727,10 +811,11 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page) {
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/* relock the flash */
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lock_flash(sl);
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}
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/* todo: verify the erased page */
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/* todo: verify the erased page */
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return 0;
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return 0;
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}
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int stlink_erase_flash_mass(stlink_t *sl) {
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@ -796,7 +881,14 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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};
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static const uint8_t loader_code_stm32l[] = {
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/* see openocd.git/contib/loaders/flash/stm32lx.s for src */
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/* openocd.git/contrib/loaders/flash/stm32lx.S
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r0, input, dest addr
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r1, input, source addr
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r2, input, word count
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r3, output, word count
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*/
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0x00, 0x23,
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0x04, 0xe0,
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@ -849,9 +941,6 @@ int stlink_fcheck_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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return res;
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}
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// The stlink_fwrite_flash should not muck with mmapped files inside itself,
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// and should use this function instead. (Hell, what's the reason behind mmap
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// there?!) But, as it is not actually used anywhere, nobody cares.
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#define WRITE_BLOCK_SIZE 0x40
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@ -877,23 +966,98 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
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/* needed for specializing loader */
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stlink_core_id(sl);
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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if (sl->core_id == 0x2ba01477) /* stm32l */
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{
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/* use fast word write. todo: half page. */
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/* todo, factorize with stlink_fwrite_flash */
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uint32_t val;
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uint32_t off;
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for (off = 0; off < len; off += sl->flash_pgsz) {
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/* addr must be an addr inside the page */
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if (stlink_erase_flash_page(sl, addr + off) == -1) {
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fprintf(stderr, "erase_flash_page(0x%zx) == -1\n", addr + off);
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return -1;
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}
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}
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/* disable pecr protection */
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write_uint32(sl->q_buf, 0x89abcdef);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x02030405);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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/* check pecr.pelock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 0))
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{
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fprintf(stderr, "pecr.pelock not clear\n");
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return -1;
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}
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/* unlock program memory */
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write_uint32(sl->q_buf, 0x8c9daebf);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x13141516);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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/* check pecr.prglock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 1))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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return -1;
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}
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/* write a word in program memory */
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for (off = 0; off < len; off += sizeof(uint32_t))
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{
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memcpy(sl->q_buf, (const void*)(base + off), sizeof(uint32_t));
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stlink_write_mem32(sl, addr + off, sizeof(uint32_t));
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/* wait for sr.busy to be cleared */
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while (1)
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{
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stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t));
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if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ;
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}
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}
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else /* stm32vl */
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{
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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fprintf(stderr, "init_flash_loader() == -1\n");
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return -1;
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}
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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for (off = 0; off < len; off += WRITE_BLOCK_SIZE) {
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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for (off = 0; off < len; off += WRITE_BLOCK_SIZE)
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{
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/* adjust last write size */
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size_t size = WRITE_BLOCK_SIZE;
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if ((off + WRITE_BLOCK_SIZE) > len)
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size = len - off;
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if ((off + WRITE_BLOCK_SIZE) > len) size = len - off;
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/* unlock and set programming mode */
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unlock_flash_if(sl);
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set_flash_cr_pg(sl);
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if (run_flash_loader(sl, &fl, addr + off, base + off, size) == -1) {
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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return -1;
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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return -1;
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}
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lock_flash(sl);
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}
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}
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for (off = 0; off < len; off += sl->flash_pgsz) {
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@ -958,25 +1122,92 @@ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
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}
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}
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/* flash loader initialization */
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if (init_flash_loader(sl, &fl) == -1) {
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fprintf(stderr, "init_flash_loader() == -1\n");
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goto on_error;
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}
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/* write each page. above WRITE_BLOCK_SIZE fails? */
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if (sl->core_id == 0x2ba01477) /* stm32l */
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{
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/* use fast word write. todo: half page. */
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uint32_t val;
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/* disable pecr protection */
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write_uint32(sl->q_buf, 0x89abcdef);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x02030405);
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stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t));
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/* check pecr.pelock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 0))
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{
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fprintf(stderr, "pecr.pelock not clear\n");
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goto on_error;
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}
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/* unlock program memory */
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write_uint32(sl->q_buf, 0x8c9daebf);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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write_uint32(sl->q_buf, 0x13141516);
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stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t));
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/* check pecr.prglock is cleared */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0);
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if (val & (1 << 1))
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{
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fprintf(stderr, "pecr.prglock not clear\n");
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goto on_error;
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}
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/* write a word in program memory */
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for (off = 0; off < mf.len; off += sizeof(uint32_t))
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{
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memcpy(sl->q_buf, (const void*)(mf.base + off), sizeof(uint32_t));
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stlink_write_mem32(sl, addr + off, sizeof(uint32_t));
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/* wait for sr.busy to be cleared */
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while (1)
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{
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stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t));
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if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ;
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}
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}
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/* reset lock bits */
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stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2);
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write_uint32(sl->q_buf, val);
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stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t));
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}
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else /* stm32vl */
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{
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#define WRITE_BLOCK_SIZE 0x40
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for (off = 0; off < mf.len; off += WRITE_BLOCK_SIZE) {
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for (off = 0; off < mf.len; off += WRITE_BLOCK_SIZE)
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{
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/* adjust last write size */
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size_t size = WRITE_BLOCK_SIZE;
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if ((off + WRITE_BLOCK_SIZE) > mf.len)
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size = mf.len - off;
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if ((off + WRITE_BLOCK_SIZE) > mf.len) size = mf.len - off;
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if (run_flash_loader(sl, &fl, addr + off, mf.base + off, size) == -1) {
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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goto on_error;
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/* unlock and set programming mode */
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unlock_flash_if(sl);
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set_flash_cr_pg(sl);
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if (init_flash_loader(sl, &fl) == -1) {
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fprintf(stderr, "init_flash_loader() == -1\n");
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goto on_error;
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}
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if (run_flash_loader(sl, &fl, addr + off, mf.base + off, size) == -1)
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{
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fprintf(stderr, "run_flash_loader(0x%zx) == -1\n", addr + off);
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goto on_error;
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}
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}
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lock_flash(sl);
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}
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} /* stm32vl */
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/* check the file ha been written */
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if (check_file(sl, &mf, addr) == -1) {
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@ -993,38 +1224,66 @@ on_error:
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}
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int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
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const size_t count = size / sizeof (uint16_t);
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reg rr;
|
||||
|
||||
if (write_buffer_to_sram(sl, fl, buf, size) == -1) {
|
||||
fprintf(stderr, "write_buffer_to_sram() == -1\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* setup core */
|
||||
stlink_write_reg(sl, fl->buf_addr, 0); /* source */
|
||||
stlink_write_reg(sl, target, 1); /* target */
|
||||
stlink_write_reg(sl, count, 2); /* count (16 bits half words) */
|
||||
stlink_write_reg(sl, 0, 3); /* flash bank 0 (input) */
|
||||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
if (sl->core_id == 0x2ba01477) /* stm32l */ {
|
||||
|
||||
/* unlock and set programming mode */
|
||||
unlock_flash_if(sl);
|
||||
set_flash_cr_pg(sl);
|
||||
size_t count = size / sizeof(uint32_t);
|
||||
if (size % sizeof(uint32_t)) ++count;
|
||||
|
||||
/* setup core */
|
||||
stlink_write_reg(sl, target, 0); /* target */
|
||||
stlink_write_reg(sl, fl->buf_addr, 1); /* source */
|
||||
stlink_write_reg(sl, count, 2); /* count (32 bits words) */
|
||||
stlink_write_reg(sl, 0, 3); /* output count */
|
||||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
|
||||
} else /* stm32vl */ {
|
||||
|
||||
size_t count = size / sizeof(uint16_t);
|
||||
if (size % sizeof(uint16_t)) ++count;
|
||||
|
||||
/* setup core */
|
||||
stlink_write_reg(sl, fl->buf_addr, 0); /* source */
|
||||
stlink_write_reg(sl, target, 1); /* target */
|
||||
stlink_write_reg(sl, count, 2); /* count (16 bits half words) */
|
||||
stlink_write_reg(sl, 0, 3); /* flash bank 0 (input) */
|
||||
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
|
||||
|
||||
}
|
||||
|
||||
/* run loader */
|
||||
stlink_run(sl);
|
||||
stlink_step(sl);
|
||||
|
||||
while (is_core_halted(sl) == 0)
|
||||
;
|
||||
/* wait until done (reaches breakpoint) */
|
||||
while (is_core_halted(sl) == 0) ;
|
||||
|
||||
lock_flash(sl);
|
||||
/* check written byte count */
|
||||
if (sl->core_id == 0x2ba01477) /* stm32l */ {
|
||||
|
||||
/* not all bytes have been written */
|
||||
reg rr;
|
||||
stlink_read_reg(sl, 2, &rr);
|
||||
if (rr.r[2] != 0) {
|
||||
size_t count = size / sizeof(uint32_t);
|
||||
if (size % sizeof(uint32_t)) ++count;
|
||||
|
||||
stlink_read_reg(sl, 3, &rr);
|
||||
if (rr.r[3] != count) {
|
||||
fprintf(stderr, "write error, count == %u\n", rr.r[3]);
|
||||
return -1;
|
||||
}
|
||||
|
||||
} else /* stm32vl */ {
|
||||
|
||||
stlink_read_reg(sl, 2, &rr);
|
||||
if (rr.r[2] != 0) {
|
||||
fprintf(stderr, "write error, count == %u\n", rr.r[2]);
|
||||
return -1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
Ładowanie…
Reference in New Issue