Merge pull request #294 from normaldotcom/master

Added support for flashing STM32F042
pull/295/head^2
texane 2015-01-18 09:25:42 +01:00
commit 1326203825
2 zmienionych plików z 14 dodań i 1 usunięć

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@ -1385,7 +1385,7 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
sl->chip_id == STM32_CHIPID_F4_LP || sl->chip_id == STM32_CHIPID_F4_HD || (sl->chip_id == STM32_CHIPID_F411RE)){
loader_code = loader_code_stm32f4;
loader_size = sizeof(loader_code_stm32f4);
} else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL) {
} else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F04 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL) {
loader_code = loader_code_stm32f0;
loader_size = sizeof(loader_code_stm32f0);
} else if (sl->chip_id == STM32_CHIPID_L0) {

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@ -132,6 +132,8 @@ extern "C" {
#define STM32_CHIPID_F0_SMALL 0x444
#define STM32_CHIPID_F04 0x445
#define STM32_CHIPID_F0_CAN 0x448
/*
@ -367,6 +369,17 @@ extern "C" {
.bootrom_base = 0x1fffec00, // "System memory" starting address from Table 2
.bootrom_size = 0xC00 // "System memory" byte size in hex from Table 2
},
{
//Use this as an example for mapping future chips:
//RM0091 document was used to find these paramaters
.chip_id = STM32_CHIPID_F04,
.description = "F04x device",
.flash_size_reg = 0x1ffff7cc, // "Flash size data register" (pg735)
.flash_pagesize = 0x400, // Page sizes listed in Table 4
.sram_size = 0x1000, // "SRAM" byte size in hex from Table 2
.bootrom_base = 0x1fffec00, // "System memory" starting address from Table 2
.bootrom_size = 0xC00 // "System memory" byte size in hex from Table 2
},
{
//Use this as an example for mapping future chips:
//RM0091 document was used to find these paramaters