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Fix memory map for stm32l496xx boards. (#639)

pull/641/head
Mateusz Krawiec 2017-09-29 11:07:23 +02:00 zatwierdzone przez Jerry Jacobs
rodzic 6511a7e861
commit 04dc7ead42
1 zmienionych plików z 23 dodań i 2 usunięć
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25
src/gdbserver/gdb-server.c
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@ -433,6 +433,25 @@ static const char* const memory_map_template_L4 =
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area " <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
"</memory-map>"; "</memory-map>";
static const char* const memory_map_template_L496 =
"<?xml version=\"1.0\"?>"
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
"<memory-map>"
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // SRAM2 (64 KB)
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x40000\"/>" // SRAM1 (256 KB)
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
" <property name=\"blocksize\">0x800</property>"
" </memory>"
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7000\"/>" // bootrom
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x10\"/>" // option byte area
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
"</memory-map>";
static const char* const memory_map_template = static const char* const memory_map_template =
"<?xml version=\"1.0\"?>" "<?xml version=\"1.0\"?>"
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\"" "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
@ -520,10 +539,12 @@ char* make_memory_map(stlink_t *sl) {
(unsigned int)sl->sys_base, (unsigned int)sl->sys_size); (unsigned int)sl->sys_base, (unsigned int)sl->sys_size);
} else if((sl->chip_id==STLINK_CHIPID_STM32_L4) || } else if((sl->chip_id==STLINK_CHIPID_STM32_L4) ||
(sl->chip_id==STLINK_CHIPID_STM32_L43X) || (sl->chip_id==STLINK_CHIPID_STM32_L43X) ||
(sl->chip_id==STLINK_CHIPID_STM32_L46X) || (sl->chip_id==STLINK_CHIPID_STM32_L46X)) {
(sl->chip_id==STLINK_CHIPID_STM32_L496X)) {
snprintf(map, sz, memory_map_template_L4, snprintf(map, sz, memory_map_template_L4,
(unsigned int)sl->flash_size, (unsigned int)sl->flash_size); (unsigned int)sl->flash_size, (unsigned int)sl->flash_size);
} else if(sl->chip_id==STLINK_CHIPID_STM32_L496X) {
snprintf(map, sz, memory_map_template_L496,
(unsigned int)sl->flash_size, (unsigned int)sl->flash_size);
} else { } else {
snprintf(map, sz, memory_map_template, snprintf(map, sz, memory_map_template,
(unsigned int)sl->flash_size, (unsigned int)sl->flash_size,